- 05 7月, 2015 17 次提交
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由 Dave Jiang 提交于
Instead of using the platform code names, use the correct platform names to identify the respective Intel NTB hardware. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
Disable DMA usage by default, since the CPU provides much better performance with write combining. Provide a module parameter to enable DMA usage when offloading the memcpy is preferred. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
Changing the memory window BAR mappings to write combining significantly boosts the performance. We will also use memcpy that uses non-temporal store, which showed performance improvement when doing non-cached memcpys. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
Allocate memory for the NUMA node of the NTB device. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
Allocate memory and request the DMA channel for the same NUMA node as the NTB device. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
When the ntb transport is connecting and waiting for the peer, the debug console receives lots of debug level messages about the remote qp link status being down. Rate limit those messages. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
This is a simple debugging driver that enables the doorbell and scratch pad registers to be read and written from the debugfs. This tool enables more complicated debugging to be scripted from user space. This driver may be used to test that your ntb hardware and drivers are functioning at a basic level. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
This is a simple ping pong driver that exercises the scratch pads and doorbells of the ntb hardware. This driver may be used to test that your ntb hardware and drivers are functioning at a basic level. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
Add module parameters for the addresses to be used in B2B topology. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
Reset the link stats when the link goes down. In particular, the TX and RX index and count must be reset, or else the TX side will be sending packets to the RX side where the RX side is not expecting them. Reset all the stats, to be consistent. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
On link down, don't advance RX index to the next entry. The next entry should never be valid after receiving the link down flag. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
The same message "qp %d: Link Down\n" was printed at two locations in ntb_transport. Change the messages so they are distinct. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
Set errata flags for the specific device IDs to which they apply, instead of the whole Xeon hardware class. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
Link training should be enabled in the driver probe for root port mode. We should not have to wait for transport to be loaded for this to happen. Otherwise the ntb device will not show up on the transparent bridge side of the link. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
The transport was writing and then reading the peer scratch pad, essentially reading what it just wrote instead of exchanging any information with the peer. The transport expects the peer values to be the same as the local values, so this issue was not obvious. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
Change ntb_hw_intel to use the new NTB hardware abstraction layer. Split ntb_transport into its own driver. Change it to use the new NTB hardware abstraction layer. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Allen Hubbe 提交于
Abstract the NTB device behind a programming interface, so that it can support different hardware and client drivers. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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- 02 7月, 2015 1 次提交
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由 Allen Hubbe 提交于
This patch only moves files to their new locations, before applying the next two patches adding the NTB Abstraction layer. Splitting this patch from the next is intended make distinct which code is changed only due to moving the files, versus which are substantial code changes in adding the NTB Abstraction layer. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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- 11 6月, 2015 1 次提交
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由 Daniel Verkamp 提交于
Commit ab760a0c (ntb: Adding split BAR support for Haswell platforms) changed ntb_device's mw from a fixed-size array into a pointer that is allocated based on limits.max_mw; however, on Atom platforms, max_mw is not initialized until ntb_device_setup(), which happens after the allocation. Fill out max_mw in ntb_atom_detect() to match ntb_xeon_detect(); this happens before the use of max_mw in the ndev->mw allocation. Fixes a null pointer dereference on Atom platforms with ntb hardware. v2: fix typo (mw_max should be max_mw) Signed-off-by: NDaniel Verkamp <daniel.verkamp@intel.com> Acked-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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- 09 6月, 2015 1 次提交
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由 Jon Mason 提交于
The MW regbase and vbase(s) were not being freed if an error occurred in the vbase allocation loop. This is corrected by updating the error path for the allocation loop to err4. Reported-by: NJulia Lawall <julia.lawall@lip6.fr> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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- 07 5月, 2015 1 次提交
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由 Michael S. Tsirkin 提交于
The PCI core now disables MSI and MSI-X for all devices during enumeration regardless of CONFIG_PCI_MSI. Remove device-specific code to disable MSI/MSI-X. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 17 10月, 2014 5 次提交
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由 Dave Jiang 提交于
On the Haswell platform, a split BAR option to allow creation of 2 32bit BARs (4 and 5) from the 64bit BAR 4. Adding support for this new option. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
Instead of using a module parameter, we should detect the errata via PCI DID and then set an appropriate flag. This will be used for additional errata later on. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
To simplify some of the platform detection code. Move the platform detection to a function to be called earlier. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Dave Jiang 提交于
Move the platform detection function to separate functions to allow easier maintenence. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Jon Mason 提交于
Create a debugfs entry for the NTB device to log the basic device info, as well as display the error count on a number of registers. Signed-off-by: NJon Mason <jon.mason@intel.com>
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- 14 9月, 2014 2 次提交
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由 Dave Jiang 提交于
The NTB translate register must have the value to be BAR size aligned. This alignment check make sure that the DMA memory allocated has the proper alignment. Another requirement for NTB to function properly with memory window BAR size greater or equal to 4M is to use the CMA feature in 3.16 kernel with the appropriate CONFIG_CMA_ALIGNMENT and CONFIG_CMA_SIZE_MBYTES set. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Jon Mason 提交于
The detection of an uneven number of queues on the given memory windows was not correct. The mw_num is zero based and the mod should be division to spread them evenly over the mw's. Signed-off-by: NJon Mason <jon.mason@intel.com>
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- 08 4月, 2014 7 次提交
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由 Alexander Gordeev 提交于
As result of deprecation of MSI-X/MSI enablement functions pci_enable_msix() and pci_enable_msi_block() all drivers using these two interfaces need to be updated to use the new pci_enable_msi_range() or pci_enable_msi_exact() and pci_enable_msix_range() or pci_enable_msix_exact() interfaces. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Alexander Gordeev 提交于
This is an cleanup effort to make ntb_setup_msix() more readable - use ntb_setup_bwd_msix() to init MSI-Xs on BWD hardware and ntb_setup_snb_msix() - on SNB hardware. Function ntb_setup_snb_msix() also initializes MSI-Xs the way it should has been done - looping pci_enable_msix() until success or failure. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Alexander Gordeev 提交于
Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Jon Mason 提交于
Some white space and 80 char overruns corrected. Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Jon Mason 提交于
Provide a better event interface between the client and transport Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Alexander Gordeev 提交于
Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Roland Dreier 提交于
In the code for Xeon devices in back-to-back mode with xeon_errata_workaround disabled, the downstream device puts the wrong value in SNB_B2B_XLAT_OFFSETL (SNB_MBAR01_DSD_ADDR vs. SNB_MBAR01_USD_ADDR). This was spotted while reading code, since the typo has no practical effect, at least for now: the low 32 bits of both constants are actually identical anyway. However, it's clearer and safer to use the right name. Signed-off-by: NRoland Dreier <roland@purestorage.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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- 21 11月, 2013 5 次提交
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由 Jon Mason 提交于
Disable interrupts and poll under high load Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Jon Mason 提交于
Enable Snoop from Primary to Secondary side on BAR23 and BAR45 on all TLPs. Previously, Snoop was only enabled from Secondary to Primary side. This can have a performance improvement on some workloads. Also, make the code more obvious about how the link is being enabled. Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Jon Mason 提交于
Add a comment describing the necessary ordering of modifications to the NTB Limit and Base registers. Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Michael Opdenacker 提交于
Remove duplicate defines in drivers/ntb/ntb_regs.h Signed-off-by: NMichael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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由 Jon Mason 提交于
dmaengine_get() causes the initialization of the per-cpu channel tables. It needs to be called prior to dma_find_channel(). Initial version by Dan Williams <dan.j.williams@intel.com> Signed-off-by: NJon Mason <jon.mason@intel.com>
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