- 12 2月, 2016 1 次提交
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由 Jean Delvare 提交于
pinctrl-intel doesn't use anything from <linux/init.h>, <linux/acpi.h>, <linux/gpio.h> or <linux/pm.h>, so it should not include these header files. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 2月, 2016 2 次提交
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由 Krzysztof Adamski 提交于
sunxi_pmx_set accepts pin number and then calculates offset by subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, gets offset so we have to convert it to pin number so we won't get negative value in sunxi_pmx_set. This was only used on A10 so far, where there is only one GPIO chip with pin_base set to 0 so it didn't matter. However H3 also requires this workaround but have two pinmux sections, triggering problem for PL port. Signed-off-by: NKrzysztof Adamski <k@japko.eu> Acked-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Krzysztof Adamski 提交于
H3 has additional PIO controller similar to what we can find on A23. It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. Signed-off-by: NKrzysztof Adamski <k@japko.eu> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 2月, 2016 2 次提交
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由 David Wu 提交于
The pinctrl of rk3399 is much different from other's, especially the 3bits of drive strength. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Reviewed-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Masahiro Yamada 提交于
Add COMPILE_TEST for the compilation test coverage. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 2月, 2016 2 次提交
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由 Maxime Coquelin 提交于
While selecting the driver for compile testing seemed possible, the driver was not compiled because the driver directory was only added if ARCH_STM32 was selected. This patch now makes the pinctrl Makefile to add stm32 directory if PINCTRL_STM32 is selected. Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Coquelin 提交于
Some macros where defined in DT bindings headers, whereas only used in the driver. This patch moves these macros to the driver side. Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 06 2月, 2016 2 次提交
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由 Joshua Henderson 提交于
Add a driver for the pin controller present on the Microchip PIC32 including the specific variant PIC32MZDA. This driver provides pinmux and pinconfig operations as well as GPIO and IRQ chips for the GPIO banks. Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
- Fix the dev->parent assignment compile error - Use gpiochip_get_data() to get the data pointer for the banks Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 2月, 2016 2 次提交
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由 Masahiro Yamada 提交于
Tegra has several pinctrl drivers. Now it is reasonable enough to move them into drivers/pinctrl/tegra/. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Biao Huang 提交于
Implement the .gpio_request_enable() callbacks in struct pinmux_ops in mediatek pinctrl driver. Make sure that when gpio_request is called, GPIO on the pin is enabled. Signed-off-by: NBiao Huang <biao.huang@mediatek.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 1月, 2016 4 次提交
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由 Masahiro Yamada 提交于
CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The STn8815 has 22 dedicated pins for CLCD with up to 16 bits in parallel, but pins 32 thru 39 can be used for an additional CLCD signal lines 16 thru 23. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Masahiro Yamada 提交于
CONFIG_PINCTRL_PXA is more suitable than CONFIG_ARCH_PXA to guard the drivers/pinctrl/pxa/ directory. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Biao Huang 提交于
Add mt2701 support using mediatek common pinctrl driver. MT2701 have some special pins need an extra setting register than other ICs, so adding this support to common code. Signed-off-by: NBiao Huang <biao.huang@mediatek.com> Acked-by: NYingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 1月, 2016 5 次提交
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由 Stephen Boyd 提交于
The ULT type of MPPs don't have a pullup. Skip configuring the pullup on these types of pins. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NAndy Gross <andy.gross@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Stefan Agner 提交于
The Freescale Vybrid SoC has GPIO capabilities as part of the IOMUXC. To enable GPIO's, the gpio_request_enable callback has been implemented, however the corsponding gpio_disable_free callback is missing. So far, disabling (unexporting) a GPIO left the pin in its last state. Implement a proper gpio_disable_free function which clears the three enable bits which influence the state (IBE, OBE and PUE). Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Paul Gortmaker 提交于
The Kconfig for these drivers are currently: config PINCTRL_MT8127 bool "Mediatek MT8127 pin control" if COMPILE_TEST && !MACH_MT8127 config PINCTRL_MT8135 bool "Mediatek MT8135 pin control" if COMPILE_TEST && !MACH_MT8135 config PINCTRL_MT8173 bool "Mediatek MT8173 pin control" ...meaning that they are currently not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. A recent commit moved these from module_init to arch_initcall already, so the init ordering remains untouched with this commit. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Daniel Kurtz <djkurtz@chromium.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Hongzhou Yang <hongzhou.yang@mediatek.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Coquelin 提交于
This patch adds pinctrl and GPIO support to STMicroelectronic's STM32 family of MCUs. While it only supports STM32F429 for now, it has been designed to enable support of other MCUs of the family (e.g. STM32F746). Acked-by: NPatrice Chotard <patrice.chotard@st.com> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Patrice Chotard 提交于
This activates strict mode muxing for the ST pin controllers, as these do not allow GPIO and functions to use the same pin simultaneously. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 1月, 2016 2 次提交
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由 Josh Boyer 提交于
Like the Yoga 900 models the Lenovo Yoga 700 does not have a hw rfkill switch, and trying to read the hw rfkill switch through the ideapad module causes it to always reported blocking breaking wifi. This commit adds the Lenovo Yoga 700 to the no_hw_rfkill dmi list, fixing the wifi breakage. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1295272 Tested-by: <dinyar.rabady+spam@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: NJosh Boyer <jwboyer@fedoraproject.org> Signed-off-by: NDarren Hart <dvhart@linux.intel.com>
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由 Souvik Kumar Chakravarty 提交于
This patch fixes compile time warnings when CONFIG_PM_SLEEP is undefined. In this case sleep related counters are unused. Signed-off-by: NSouvik Kumar Chakravarty <souvik.k.chakravarty@intel.com> Signed-off-by: NDarren Hart <dvhart@linux.intel.com>
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- 24 1月, 2016 3 次提交
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由 Simon Arlott 提交于
The extended flash address needs to be subtracted from bcm_tag flash image offsets. Move this value to the bcm_tag header file. Renamed define name to consistently use bcm963xx for flash layout which should be considered a property of the board and not the SoC (i.e. bcm63xx could theoretically be used on a board without CFE or any flash). Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11833/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Simon Arlott 提交于
Move Broadcom BCM963xx image tag data structure to include/linux/ so that drivers outside of mach-bcm63xx can use it. Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11832/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Cristian Birsan 提交于
This adds support for the interrupt controller present on PIC32 class devices. It handles all internal and external interrupts. This controller exists outside of the CPU core and is the arbitrator of all interrupts (including interrupts from the CPU itself) before they are presented to the CPU. The following features are supported: - DT properties for EVIC and for devices/peripherals that use interrupt lines - Persistent and non-persistent interrupt handling - irqdomain and generic chip support - Configuration of external interrupt edge polarity Signed-off-by: NCristian Birsan <cristian.birsan@microchip.com> Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12092/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 23 1月, 2016 3 次提交
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由 Tetsuo Handa 提交于
There are many locations that do if (memory_was_allocated_by_vmalloc) vfree(ptr); else kfree(ptr); but kvfree() can handle both kmalloc()ed memory and vmalloc()ed memory using is_vmalloc_addr(). Unless callers have special reasons, we can replace this branch with kvfree(). Please check and reply if you found problems. Signed-off-by: NTetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Acked-by: NMichal Hocko <mhocko@suse.com> Acked-by: NJan Kara <jack@suse.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: NAndreas Dilger <andreas.dilger@intel.com> Acked-by: N"Rafael J. Wysocki" <rjw@rjwysocki.net> Acked-by: NDavid Rientjes <rientjes@google.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Oleg Drokin <oleg.drokin@intel.com> Cc: Boris Petkov <bp@suse.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Al Viro 提交于
parallel to mutex_{lock,unlock,trylock,is_locked,lock_nested}, inode_foo(inode) being mutex_foo(&inode->i_mutex). Please, use those for access to ->i_mutex; over the coming cycle ->i_mutex will become rwsem, with ->lookup() done with it held only shared. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 22 1月, 2016 12 次提交
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由 Arnd Bergmann 提交于
gcc warns about the 'found' variable possibly being used uninitialized: drivers/soc/qcom/spm.c: In function 'spm_dev_probe': drivers/soc/qcom/spm.c:305:5: error: 'found' may be used uninitialized in this function [-Werror=maybe-uninitialized] However, the code is correct because we know that there is always at least one online CPU. This initializes the 'found' variable to zero before the loop so the compiler knows it does not have to warn about it. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Allen Hubbe 提交于
If the parameter given to the macro is replaced throughout the macro as it is evaluated. The intent is that the macro parameter should replace the only the first parameter to container_of(). However, the way the macro was written, it would also inadvertantly replace a structure field name. If a parameter of any other name is given to the macro, it will fail to compile, if the structure does not contain a field of the same name. At worst, it will compile, and hide improper access of an unintended field in the structure. Change the macro parameter name, so it does not conflict with the structure field name. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Acked-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Xiangliang Yu 提交于
This adds support for AMD's PCI-Express Non-Transparent Bridge (NTB) device on the Zeppelin platform. The driver connnects to the standard NTB sub-system interface, with modification to add hooks for power management in a separate patch. The AMD NTB device has 3 memory windows, 16 doorbell, 16 scratch-pad registers, and supports up to 16 PCIe lanes running a Gen3 speeds. Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Markus Elfring 提交于
The rbd_dev_destroy() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NIlya Dryomov <idryomov@gmail.com>
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由 Leon Romanovsky 提交于
The create_cq() can receive creation flags which were used differently by two commits which added create_cq extended command and cross-channel. The merged code caused to not accept any flags at all. This patch unifies the check into one function and one return error code. Fixes: 972ecb82 ("IB/mlx5: Add create_cq extended command") Fixes: 051f2630 ("IB/mlx5: Add driver cross-channel support") Signed-off-by: NLeon Romanovsky <leonro@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Added Raw Packet QP modify functionality which will enable user space consumers to use it. Since Raw Packet QP is built of SQ and RQ sub-objects, therefore Raw Packet QP state changes are implemented by changing the state of the sub-objects. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
When modifying a QP, the desired operation was determined in the mlx5_core using a transition table that takes the current state, the final state, and returns the desired operation. Since this logic will be used for Raw Packet QP, move the operation table to the mlx5_ib. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
When the user changes the Address Vector(AV) in the modify QP, he provides an SL. This SL should be translated to Ethernet Priority by taking the 3 LSB bits, and modify the QP's TIS according to this Ethernet priority. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Since Raw Packet QP is composed of RQ and SQ, the IB QP's state is derived from the sub-objects. Therefore we need to query each one of the sub-objects, and decide on the IB QP's state. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
This patch adds support for Raw Packet QP for the mlx5 device. Raw Packet QP, unlike other QP types, has no matching mlx5_core_qp object but rather it is built of RQ/SQ/TIR/TIS/TD mlx5_core object. Since the SQ and RQ work-queue (WQ) buffers are not contiguous like other QPs, we allocate separate buffers in the user-space and pass the address of each one of them separately to the kernel. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Extract specific IB QP fields to mlx5_ib_qp_trans structure. The mlx5_core QP object resides in mlx5_ib_qp_base, which all QP types inherit from. When we need to find mlx5_ib_qp using mlx5_core QP (event handling and co), we use a pointer that resides in mlx5_ib_qp_base. In addition, we delete all redundant fields that weren't used anywhere in the code: -doorbell_qpn -sq_max_wqes_per_wr -sq_spare_wqes Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Transport Domain groups several TIS and TIR object. By grouping these object, it defines wheather local loopback packets that are sent from the TIS objects in the group are received by the TIR objects in the same group. Allocate a Transport Domain(TD) for each user context to be used in the future by Raw Packet QP for Self-Loopback Control. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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