Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - kernel_thread
 - irq_flags
 - checksum
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Add supporing for Blackfin BF538 and BF539 processors.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Blackfin arch: clear EMAC_SYSTAT during IRQ init rather than early head.S as we dont need it setup that early
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

This way we ensure that reboot succeeds.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - Disable all bits in SIC_IWR unless we are going into a real (DPMC)
   power saving mode. Any Interrupt can wake the core form it's idle state.

 - Remove deep sleep mode as it is not going to be used anywhere:
   We support sleep, sleep deeper and hibernate.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Merge VR Regulator Hibernate wakeups into set_irq_wake for internal
interrupts.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - Implement irq_chip.enable and irq_chip.disable
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Remove the circular buffering mechanism for exceptions.  Instead, point RETX
at a safe location from which to fetch three NOPs.

This safe location is now in the fixed code area, and also used for certain
anomaly workarounds, to ensure that user space can find a valid ICPLB when
things are built with CONFIG_MPU.

Also, save I/DCPLB_FAULT_ADDRESS when lowering to level 5, since the hardware
reg is valid only at exception level.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

The irq setup code no longer calls gpio request and free.
This patch also changes the default gpio_free behavior on Blackfin.
A freed GPIO keeps it's last state, and is not defaulted back to
an input. This is also what all other architectures do.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - Buttons on the BF533-STAMP board are not inverted
 - Fix spurious GPIO Interrupt caused during set irq_type for edge triggered interrupts
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

 - Add support for irq_wake on system and gpio interrupts
 - Remove outdated kernel options
 - Add option to select default PM mode
 - Fix various places where SIC_IWRx was only handled partially
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Merge single core ints-priority-sc.c and dual core ints-priority-dc.c
into one common code ints-priority.c
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

since we have this always turned on now and dont want it off (and hasnt been an option in a while)
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

force irq_flags into the .data section by initializing it to
the hardware masks that cannot be disabled.  this way if we
use irq enable/disable functions before the .bss has been
zeroed out (as does our l1 relocate/dma functions), we dont
hit a problem where bss contains bogus crap.
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

 - allow people to select the feature that is unavailable to the kernel: NMI, JTAG, or CYCLES.
 - change default NMI handler to simply dump hardware trace buffer.
 - remove default NMI handler completely as calling into kernel code is not safe
   move example handler to wiki so people dont haphazardly copy and paste this stuff thinking its safe
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Initialize the exception vectors early in the boot process, so that CPLB faults
can be handled when memory protection is enabled.
Signed-off-by: NBernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-bu: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

SIC_IWR crosses several registers
 - add missing implementations
 - make sure SIC_IWR is SET after boot
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia
applications where system performance and cost are essential ingredients. The
integration of multimedia, human interface, and connectivity peripherals combined
with increased system bandwidth and on-chip memory provides customers a platform to
design the most demanding applications.

Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers
such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will
be submitted later.

Please enjoy the show.
Signed-off-by: NRoy Huang <roy.huang@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix!  Tinyboards.

The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc.  (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000.  Since then ADI has put this core into its Blackfin
processor family of devices.  The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set.  It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.

The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc

This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/

We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: NBryan Wu <bryan.wu@analog.com>
Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: NAubrey Li <aubrey.li@analog.com>
Signed-off-by: NJie Zhang <jie.zhang@analog.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>