1. 15 6月, 2016 1 次提交
  2. 02 3月, 2016 1 次提交
    • M
      arm64: Rework valid_user_regs · dbd4d7ca
      Mark Rutland 提交于
      We validate pstate using PSR_MODE32_BIT, which is part of the
      user-provided pstate (and cannot be trusted). Also, we conflate
      validation of AArch32 and AArch64 pstate values, making the code
      difficult to reason about.
      
      Instead, validate the pstate value based on the associated task. The
      task may or may not be current (e.g. when using ptrace), so this must be
      passed explicitly by callers. To avoid circular header dependencies via
      sched.h, is_compat_task is pulled out of asm/ptrace.h.
      
      To make the code possible to reason about, the AArch64 and AArch32
      validation is split into separate functions. Software must respect the
      RES0 policy for SPSR bits, and thus the kernel mirrors the hardware
      policy (RAZ/WI) for bits as-yet unallocated. When these acquire an
      architected meaning writes may be permitted (potentially with additional
      validation).
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Cc: Dave Martin <dave.martin@arm.com>
      Cc: James Morse <james.morse@arm.com>
      Cc: Peter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      dbd4d7ca
  3. 08 12月, 2015 1 次提交
  4. 27 7月, 2015 1 次提交
    • C
      arm64: Better native ptrace support for compat tasks · 5d220ff9
      Catalin Marinas 提交于
      The compat ptrace interface allows access to the TLS register, hardware
      breakpoints and watchpoints, syscall number. However, a native task
      using the native ptrace interface to debug compat tasks (e.g. multi-arch
      gdb) only has access to the general and VFP register sets. The compat
      ptrace interface cannot be accessed from a native task.
      
      This patch adds a new user_aarch32_ptrace_view which contains the TLS,
      hardware breakpoint/watchpoint and syscall number regsets in addition to
      the existing GPR and VFP regsets. This view is backwards compatible with
      the previous kernels. Core dumping of 32-bit tasks and compat ptrace are
      not affected since the original user_aarch32_view is preserved.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Reported-by: NYao Qi <yao.qi@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      5d220ff9
  5. 28 11月, 2014 2 次提交
    • A
      arm64: add seccomp support · a1ae65b2
      AKASHI Takahiro 提交于
      secure_computing() is called first in syscall_trace_enter() so that
      a system call will be aborted quickly without doing succeeding syscall
      tracing if seccomp rules want to deny that system call.
      
      On compat task, syscall numbers for system calls allowed in seccomp mode 1
      are different from those on normal tasks, and so _NR_seccomp_xxx_32's need
      to be redefined.
      Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      a1ae65b2
    • A
      arm64: ptrace: add NT_ARM_SYSTEM_CALL regset · 766a85d7
      AKASHI Takahiro 提交于
      This regeset is intended to be used to get and set a system call number
      while tracing.
      There was some discussion about possible approaches to do so:
      
      (1) modify x8 register with ptrace(PTRACE_SETREGSET) indirectly,
          and update regs->syscallno later on in syscall_trace_enter(), or
      (2) define a dedicated regset for this purpose as on s390, or
      (3) support ptrace(PTRACE_SET_SYSCALL) as on arch/arm
      
      Thinking of the fact that user_pt_regs doesn't expose 'syscallno' to
      tracer as well as that secure_computing() expects a changed syscall number,
      especially case of -1, to be visible before this function returns in
      syscall_trace_enter(), (1) doesn't work well.
      We will take (2) since it looks much cleaner.
      Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      766a85d7
  6. 24 9月, 2014 2 次提交
  7. 29 8月, 2014 2 次提交
    • W
      arm64: ptrace: fix compat reg getter/setter return values · 85487edd
      Will Deacon 提交于
      copy_{to,from}_user return the number of bytes remaining on failure, not
      an error code.
      
      This patch returns -EFAULT when the copy operation didn't complete,
      rather than expose the number of bytes not copied directly to userspace.
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      85487edd
    • W
      arm64: ptrace: fix compat hardware watchpoint reporting · 27d7ff27
      Will Deacon 提交于
      I'm not sure what I was on when I wrote this, but when iterating over
      the hardware watchpoint array (hbp_watch_array), our index is off by
      ARM_MAX_BRP, so we walk off the end of our thread_struct...
      
      ... except, a dodgy condition in the loop means that it never executes
      at all (bp cannot be NULL).
      
      This patch fixes the code so that we remove the bp check and use the
      correct index for accessing the watchpoint structures.
      
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      27d7ff27
  8. 20 8月, 2014 1 次提交
  9. 24 7月, 2014 1 次提交
  10. 10 7月, 2014 1 次提交
  11. 18 6月, 2014 2 次提交
  12. 29 5月, 2014 1 次提交
  13. 12 5月, 2014 2 次提交
  14. 08 5月, 2014 1 次提交
    • A
      arm64: defer reloading a task's FPSIMD state to userland resume · 005f78cd
      Ard Biesheuvel 提交于
      If a task gets scheduled out and back in again and nothing has touched
      its FPSIMD state in the mean time, there is really no reason to reload
      it from memory. Similarly, repeated calls to kernel_neon_begin() and
      kernel_neon_end() will preserve and restore the FPSIMD state every time.
      
      This patch defers the FPSIMD state restore to the last possible moment,
      i.e., right before the task returns to userland. If a task does not return to
      userland at all (for any reason), the existing FPSIMD state is preserved
      and may be reused by the owning task if it gets scheduled in again on the
      same CPU.
      
      This patch adds two more functions to abstract away from straight FPSIMD
      register file saves and restores:
      - fpsimd_restore_current_state -> ensure current's FPSIMD state is loaded
      - fpsimd_flush_task_state -> invalidate live copies of a task's FPSIMD state
      Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      005f78cd
  15. 20 12月, 2013 1 次提交
    • W
      arm64: ptrace: avoid using HW_BREAKPOINT_EMPTY for disabled events · cdc27c27
      Will Deacon 提交于
      Commit 8f34a1da ("arm64: ptrace: use HW_BREAKPOINT_EMPTY type for
      disabled breakpoints") fixed an issue with GDB trying to zero breakpoint
      control registers. The problem there is that the arch hw_breakpoint code
      will attempt to create a (disabled), execute breakpoint of length 0.
      
      This will fail validation and report unexpected failure to GDB. To avoid
      this, we treated disabled breakpoints as HW_BREAKPOINT_EMPTY, but that
      seems to have broken with recent kernels, causing watchpoints to be
      treated as TYPE_INST in the core code and returning ENOSPC for any
      further breakpoints.
      
      This patch fixes the problem by prioritising the `enable' field of the
      breakpoint: if it is cleared, we simply update the perf_event_attr to
      indicate that the thing is disabled and don't bother changing either the
      type or the length. This reinforces the behaviour that the breakpoint
      control register is essentially read-only apart from the enable bit
      when disabling a breakpoint.
      
      Cc: <stable@vger.kernel.org>
      Reported-by: NAaron Liu <liucy214@gmail.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      cdc27c27
  16. 29 11月, 2013 1 次提交
  17. 12 6月, 2013 1 次提交
  18. 19 10月, 2012 2 次提交
  19. 11 10月, 2012 1 次提交
  20. 27 9月, 2012 1 次提交
  21. 17 9月, 2012 1 次提交