1. 14 11月, 2018 12 次提交
    • M
      ARM: dts: exynos: Disable pull control for MAX8997 interrupts on Origen · 3f8141b1
      Marek Szyprowski 提交于
      commit f5e758b8358f6c27e8a351ddf0b441a64cdabb94 upstream.
      
      PMIC_IRQB and PMIC_KEYINB lines on Exynos4210-based Origen board have
      external pull-up resistors, so disable any pull control for those lines
      in respective pin controller node. This fixes support for MAX8997
      interrupts and enables operation of wakeup from MAX8997 RTC alarm.
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Fixes: 17419726 ("ARM: dts: add max8997 device node for exynos4210-origen board")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      3f8141b1
    • D
      x86/numa_emulation: Fix uniform-split numa emulation · d9f91499
      Dave Jiang 提交于
      commit c6ee7a548e2c291398b4f32c1f741c66b9f98e1c upstream.
      
      The numa_emulation() routine in the 'uniform' case walks through all the
      physical 'memblk' instances and divides them into N emulated nodes with
      split_nodes_size_interleave_uniform(). As each physical node is consumed it
      is removed from the physical memblk array in the numa_remove_memblk_from()
      helper.
      
      Since split_nodes_size_interleave_uniform() handles advancing the array as
      the 'memblk' is consumed it is expected that the base of the array is
      always specified as the argument.
      
      Otherwise, on multi-socket (> 2) configurations the uniform-split
      capability can generate an invalid numa configuration leading to boot
      failures with signatures like the following:
      
          rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
          Sending NMI from CPU 0 to CPUs 2:
          NMI backtrace for cpu 2
          CPU: 2 PID: 1332 Comm: pgdatinit0 Not tainted 4.19.0-rc8-next-20181019-baseline #59
          RIP: 0010:__init_single_page.isra.74+0x81/0x90
          [..]
          Call Trace:
           deferred_init_pages+0xaa/0xe3
           deferred_init_memmap+0x18f/0x318
           kthread+0xf8/0x130
           ? deferred_free_pages.isra.105+0xc9/0xc9
           ? kthread_stop+0x110/0x110
           ret_from_fork+0x35/0x40
      
      Fixes: 1f6a2c6d9f121 ("x86/numa_emulation: Introduce uniform split capability")
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Tested-by: NAlexander Duyck <alexander.h.duyck@linux.intel.com>
      Reviewed-by: NDave Hansen <dave.hansen@linux.intel.com>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/154049911459.2685845.9210186007479774286.stgit@dwillia2-desk3.amr.corp.intel.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      d9f91499
    • S
      x86/mm/pat: Disable preemption around __flush_tlb_all() · e36453b6
      Sebastian Andrzej Siewior 提交于
      commit f77084d96355f5fba8e2c1fb3a51a393b1570de7 upstream.
      
      The WARN_ON_ONCE(__read_cr3() != build_cr3()) in switch_mm_irqs_off()
      triggers every once in a while during a snapshotted system upgrade.
      
      The warning triggers since commit decab088 ("x86/mm: Remove
      preempt_disable/enable() from __native_flush_tlb()"). The callchain is:
      
        get_page_from_freelist() -> post_alloc_hook() -> __kernel_map_pages()
      
      with CONFIG_DEBUG_PAGEALLOC enabled.
      
      Disable preemption during CR3 reset / __flush_tlb_all() and add a comment
      why preemption has to be disabled so it won't be removed accidentaly.
      
      Add another preemptible() check in __flush_tlb_all() to catch callers with
      enabled preemption when PGE is enabled, because PGE enabled does not
      trigger the warning in __native_flush_tlb(). Suggested by Andy Lutomirski.
      
      Fixes: decab088 ("x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()")
      Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Dave Hansen <dave.hansen@linux.intel.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181017103432.zgv46nlu3hc7k4rq@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      e36453b6
    • V
      x86/kvm/nVMX: allow bare VMXON state migration · 97dc5051
      Vitaly Kuznetsov 提交于
      commit a1b0c1c64dfef0cff8555bb708bfc5d7c66c6ca4 upstream.
      
      It is perfectly valid for a guest to do VMXON and not do VMPTRLD. This
      state needs to be preserved on migration.
      
      Cc: stable@vger.kernel.org
      Fixes: 8fcc4b59Signed-off-by: NVitaly Kuznetsov <vkuznets@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      97dc5051
    • H
      x86/corruption-check: Fix panic in memory_corruption_check() when boot option... · 967afd9a
      He Zhe 提交于
      x86/corruption-check: Fix panic in memory_corruption_check() when boot option without value is provided
      
      commit ccde460b9ae5c2bd5e4742af0a7f623c2daad566 upstream.
      
      memory_corruption_check[{_period|_size}]()'s handlers do not check input
      argument before passing it to kstrtoul() or simple_strtoull(). The argument
      would be a NULL pointer if each of the kernel parameters, without its
      value, is set in command line and thus cause the following panic.
      
      PANIC: early exception 0xe3 IP 10:ffffffff73587c22 error 0 cr2 0x0
      [    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 4.18-rc8+ #2
      [    0.000000] RIP: 0010:kstrtoull+0x2/0x10
      ...
      [    0.000000] Call Trace
      [    0.000000]  ? set_corruption_check+0x21/0x49
      [    0.000000]  ? do_early_param+0x4d/0x82
      [    0.000000]  ? parse_args+0x212/0x330
      [    0.000000]  ? rdinit_setup+0x26/0x26
      [    0.000000]  ? parse_early_options+0x20/0x23
      [    0.000000]  ? rdinit_setup+0x26/0x26
      [    0.000000]  ? parse_early_param+0x2d/0x39
      [    0.000000]  ? setup_arch+0x2f7/0xbf4
      [    0.000000]  ? start_kernel+0x5e/0x4c2
      [    0.000000]  ? load_ucode_bsp+0x113/0x12f
      [    0.000000]  ? secondary_startup_64+0xa5/0xb0
      
      This patch adds checks to prevent the panic.
      Signed-off-by: NHe Zhe <zhe.he@windriver.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: gregkh@linuxfoundation.org
      Cc: kstewart@linuxfoundation.org
      Cc: pombredanne@nexb.com
      Cc: stable@vger.kernel.org
      Link: http://lkml.kernel.org/r/1534260823-87917-1-git-send-email-zhe.he@windriver.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      
      967afd9a
    • J
      x86/xen: Fix boot loader version reported for PVH guests · 9f775ed2
      Juergen Gross 提交于
      commit 357d291ce035d1b757568058f3c9898c60d125b1 upstream.
      
      The boot loader version reported via sysfs is wrong in case of the
      kernel being booted via the Xen PVH boot entry. it should be 2.12
      (0x020c), but it is reported to be 2.18 (0x0212).
      
      As the current way to set the version is error prone use the more
      readable variant (2 << 8) | 12.
      Signed-off-by: NJuergen Gross <jgross@suse.com>
      Cc: <stable@vger.kernel.org> # 4.12
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: boris.ostrovsky@oracle.com
      Cc: bp@alien8.de
      Cc: corbet@lwn.net
      Cc: linux-doc@vger.kernel.org
      Cc: xen-devel@lists.xenproject.org
      Link: http://lkml.kernel.org/r/20181010061456.22238-2-jgross@suse.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      9f775ed2
    • J
      x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation · 233b9d7d
      Jiri Kosina 提交于
      commit 53c613fe6349994f023245519265999eed75957f upstream.
      
      STIBP is a feature provided by certain Intel ucodes / CPUs. This feature
      (once enabled) prevents cross-hyperthread control of decisions made by
      indirect branch predictors.
      
      Enable this feature if
      
      - the CPU is vulnerable to spectre v2
      - the CPU supports SMT and has SMT siblings online
      - spectre_v2 mitigation autoselection is enabled (default)
      
      After some previous discussion, this leaves STIBP on all the time, as wrmsr
      on crossing kernel boundary is a no-no. This could perhaps later be a bit
      more optimized (like disabling it in NOHZ, experiment with disabling it in
      idle, etc) if needed.
      
      Note that the synchronization of the mask manipulation via newly added
      spec_ctrl_mutex is currently not strictly needed, as the only updater is
      already being serialized by cpu_add_remove_lock, but let's make this a
      little bit more future-proof.
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Josh Poimboeuf <jpoimboe@redhat.com>
      Cc: Andrea Arcangeli <aarcange@redhat.com>
      Cc:  "WoodhouseDavid" <dwmw@amazon.co.uk>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Tim Chen <tim.c.chen@linux.intel.com>
      Cc:  "SchauflerCasey" <casey.schaufler@intel.com>
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/nycvar.YFH.7.76.1809251438240.15880@cbobk.fhfr.pmSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      233b9d7d
    • H
      parisc: Fix exported address of os_hpmc handler · e41a6afd
      Helge Deller 提交于
      commit 99a3ae51d557d8e38a7aece65678a31f9db215ee upstream.
      
      In the C-code we need to put the physical address of the hpmc handler in
      the interrupt vector table (IVA) in order to get HPMCs working.  Since
      on parisc64 function pointers are indirect (in fact they are function
      descriptors) we instead export the address as variable and not as
      function.
      
      This reverts a small part of commit f39cce65 ("parisc: Add
      cfi_startproc and cfi_endproc to assembly code").
      Signed-off-by: NHelge Deller <deller@gmx.de>
      Cc: <stable@vger.kernel.org>    [4.9+]
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      e41a6afd
    • H
      parisc: Fix map_pages() to not overwrite existing pte entries · 72f6b9c0
      Helge Deller 提交于
      commit 3c229b3f2dd8133f61bb81d3cb018be92f4bba39 upstream.
      
      Fix a long-existing small nasty bug in the map_pages() implementation which
      leads to overwriting already written pte entries with zero, *if* map_pages() is
      called a second time with an end address which isn't aligned on a pmd boundry.
      This happens for example if we want to remap only the text segment read/write
      in order to run alternative patching on the code. Exiting the loop when we
      reach the end address fixes this.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NHelge Deller <deller@gmx.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      72f6b9c0
    • J
      parisc: Fix address in HPMC IVA · dcfc4972
      John David Anglin 提交于
      commit 1138b6718ff74d2a934459643e3754423d23b5e2 upstream.
      
      Helge noticed that the address of the os_hpmc handler was not being
      correctly calculated in the hpmc macro.  As a result, PDCE_CHECK would
      fail to call os_hpmc:
      
      <Cpu2> e800009802e00000  0000000000000000  CC_ERR_CHECK_HPMC
      <Cpu2> 37000f7302e00000  8040004000000000  CC_ERR_CPU_CHECK_SUMMARY
      <Cpu2> f600105e02e00000  fffffff0f0c00000  CC_MC_HPMC_MONARCH_SELECTED
      <Cpu2> 140003b202e00000  000000000000000b  CC_ERR_HPMC_STATE_ENTRY
      <Cpu2> 5600100b02e00000  00000000000001a0  CC_MC_OS_HPMC_LEN_ERR
      <Cpu2> 5600106402e00000  fffffff0f0438e70  CC_MC_BR_TO_OS_HPMC_FAILED
      <Cpu2> e800009802e00000  0000000000000000  CC_ERR_CHECK_HPMC
      <Cpu2> 37000f7302e00000  8040004000000000  CC_ERR_CPU_CHECK_SUMMARY
      <Cpu2> 4000109f02e00000  0000000000000000  CC_MC_HPMC_INITIATED
      <Cpu2> 4000101902e00000  0000000000000000  CC_MC_MULTIPLE_HPMCS
      <Cpu2> 030010d502e00000  0000000000000000  CC_CPU_STOP
      
      The address problem can be seen by dumping the fault vector:
      
      0000000040159000 <fault_vector_20>:
          40159000:   63 6f 77 73     stb r15,-2447(dp)
          40159004:   20 63 61 6e     ldil L%b747000,r3
          40159008:   20 66 6c 79     ldil L%-1c3b3000,r3
              ...
          40159020:   08 00 02 40     nop
          40159024:   20 6e 60 02     ldil L%15d000,r3
          40159028:   34 63 00 00     ldo 0(r3),r3
          4015902c:   e8 60 c0 02     bv,n r0(r3)
          40159030:   08 00 02 40     nop
          40159034:   00 00 00 00     break 0,0
          40159038:   c0 00 70 00     bb,*< r0,sar,40159840 <fault_vector_20+0x840>
          4015903c:   00 00 00 00     break 0,0
      
      Location 40159038 should contain the physical address of os_hpmc:
      
      000000004015d000 <os_hpmc>:
          4015d000:   08 1a 02 43     copy r26,r3
          4015d004:   01 c0 08 a4     mfctl iva,r4
          4015d008:   48 85 00 68     ldw 34(r4),r5
      
      This patch moves the address setup into initialize_ivt to resolve the
      above problem.  I tested the change by dumping the HPMC entry after setup:
      
      0000000040209020:  8000240
      0000000040209024: 206a2004
      0000000040209028: 34630ac0
      000000004020902c: e860c002
      0000000040209030:  8000240
      0000000040209034: 1bdddce6
      0000000040209038:   15d000
      000000004020903c:      1a0
      Signed-off-by: NJohn David Anglin <dave.anglin@bell.net>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NHelge Deller <deller@gmx.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      dcfc4972
    • M
      kprobes/x86: Use preempt_enable() in optimized_callback() · b7e4138c
      Masami Hiramatsu 提交于
      commit 2e62024c265aa69315ed02835623740030435380 upstream.
      
      The following commit:
      
        a19b2e3d ("kprobes/x86: Remove IRQ disabling from ftrace-based/optimized kprobes”)
      
      removed local_irq_save/restore() from optimized_callback(), the handler
      might be interrupted by the rescheduling interrupt and might be
      rescheduled - so we must not use the preempt_enable_no_resched() macro.
      
      Use preempt_enable() instead, to not lose preemption events.
      
      [ mingo: Improved the changelog. ]
      Reported-by: NNadav Amit <namit@vmware.com>
      Signed-off-by: NMasami Hiramatsu <mhiramat@kernel.org>
      Acked-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: <stable@vger.kernel.org>
      Cc: Alexei Starovoitov <alexei.starovoitov@gmail.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Oleg Nesterov <oleg@redhat.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: dwmw@amazon.co.uk
      Fixes: a19b2e3d ("kprobes/x86: Remove IRQ disabling from ftrace-based/optimized kprobes”)
      Link: http://lkml.kernel.org/r/154002887331.7627.10194920925792947001.stgit@devboxSigned-off-by: NIngo Molnar <mingo@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b7e4138c
    • H
      MIPS: VDSO: Reduce VDSO_RANDOMIZE_SIZE to 64MB for 64bit · 085d6959
      Huacai Chen 提交于
      [ Upstream commit c61c7def1fa0a722610d89790e0255b74f3c07dd ]
      
      Commit ea7e0480 ("MIPS: VDSO: Always map near top of user memory")
      set VDSO_RANDOMIZE_SIZE to 256MB for 64bit kernel. But take a look at
      arch/mips/mm/mmap.c we can see that MIN_GAP is 128MB, which means the
      mmap_base may be at (user_address_top - 128MB). This make the stack be
      surrounded by mmaped areas, then stack expanding fails and causes a
      segmentation fault. Therefore, VDSO_RANDOMIZE_SIZE should be less than
      MIN_GAP and this patch reduce it to 64MB.
      Signed-off-by: NHuacai Chen <chenhc@lemote.com>
      Signed-off-by: NPaul Burton <paul.burton@mips.com>
      Fixes: ea7e0480 ("MIPS: VDSO: Always map near top of user memory")
      Patchwork: https://patchwork.linux-mips.org/patch/20910/
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@linux-mips.org
      Cc: Fuxin Zhang <zhangfx@lemote.com>
      Cc: Zhangjin Wu <wuzhangjin@gmail.com>
      Cc: Huacai Chen <chenhuacai@gmail.com>
      Cc: stable@vger.kernel.org # 4.19
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      085d6959
  2. 04 11月, 2018 3 次提交
  3. 19 10月, 2018 1 次提交
  4. 18 10月, 2018 2 次提交
  5. 17 10月, 2018 4 次提交
  6. 16 10月, 2018 2 次提交
  7. 15 10月, 2018 2 次提交
  8. 14 10月, 2018 5 次提交
    • N
      x86/boot: Add -Wno-pointer-sign to KBUILD_CFLAGS · dca5203e
      Nathan Chancellor 提交于
      When compiling the kernel with Clang, this warning appears even though
      it is disabled for the whole kernel because this folder has its own set
      of KBUILD_CFLAGS. It was disabled before the beginning of git history.
      
      In file included from arch/x86/boot/compressed/kaslr.c:29:
      In file included from arch/x86/boot/compressed/misc.h:21:
      In file included from ./include/linux/elf.h:5:
      In file included from ./arch/x86/include/asm/elf.h:77:
      In file included from ./arch/x86/include/asm/vdso.h:11:
      In file included from ./include/linux/mm_types.h:9:
      In file included from ./include/linux/spinlock.h:88:
      In file included from ./arch/x86/include/asm/spinlock.h:43:
      In file included from ./arch/x86/include/asm/qrwlock.h:6:
      ./include/asm-generic/qrwlock.h:101:53: warning: passing 'u32 *' (aka
      'unsigned int *') to parameter of type 'int *' converts between pointers
      to integer types with different sign [-Wpointer-sign]
              if (likely(atomic_try_cmpxchg_acquire(&lock->cnts, &cnts, _QW_LOCKED)))
                                                                 ^~~~~
      ./include/linux/compiler.h:76:40: note: expanded from macro 'likely'
      # define likely(x)      __builtin_expect(!!(x), 1)
                                                  ^
      ./include/asm-generic/atomic-instrumented.h:69:66: note: passing
      argument to parameter 'old' here
      static __always_inline bool atomic_try_cmpxchg(atomic_t *v, int *old, int new)
                                                                       ^
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Nick Desaulniers <ndesaulniers@google.com>
      Link: https://lkml.kernel.org/r/20181013010713.6999-1-natechancellor@gmail.com
      dca5203e
    • N
      x86/time: Correct the attribute on jiffies' definition · 53c13ba8
      Nathan Chancellor 提交于
      Clang warns that the declaration of jiffies in include/linux/jiffies.h
      doesn't match the definition in arch/x86/time/kernel.c:
      
      arch/x86/kernel/time.c:29:42: warning: section does not match previous declaration [-Wsection]
      __visible volatile unsigned long jiffies __cacheline_aligned = INITIAL_JIFFIES;
                                               ^
      ./include/linux/cache.h:49:4: note: expanded from macro '__cacheline_aligned'
                       __section__(".data..cacheline_aligned")))
                       ^
      ./include/linux/jiffies.h:81:31: note: previous attribute is here
      extern unsigned long volatile __cacheline_aligned_in_smp __jiffy_arch_data jiffies;
                                    ^
      ./arch/x86/include/asm/cache.h:20:2: note: expanded from macro '__cacheline_aligned_in_smp'
              __page_aligned_data
              ^
      ./include/linux/linkage.h:39:29: note: expanded from macro '__page_aligned_data'
      #define __page_aligned_data     __section(.data..page_aligned) __aligned(PAGE_SIZE)
                                      ^
      ./include/linux/compiler_attributes.h:233:56: note: expanded from macro '__section'
      #define __section(S)                    __attribute__((__section__(#S)))
                                                             ^
      1 warning generated.
      
      The declaration was changed in commit 7c30f352 ("jiffies.h: declare
      jiffies and jiffies_64 with ____cacheline_aligned_in_smp") but wasn't
      updated here. Make them match so Clang no longer warns.
      
      Fixes: 7c30f352 ("jiffies.h: declare jiffies and jiffies_64 with ____cacheline_aligned_in_smp")
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Nick Desaulniers <ndesaulniers@google.com>
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181013005311.28617-1-natechancellor@gmail.com
      53c13ba8
    • D
      x86/entry: Add some paranoid entry/exit CR3 handling comments · 16561f27
      Dave Hansen 提交于
      Andi Kleen was just asking me about the NMI CR3 handling and why
      we restore it unconditionally.  I was *sure* we had documented it
      well.  We did not.
      
      Add some documentation.  We have common entry code where the CR3
      value is stashed, but three places in two big code paths where we
      restore it.  I put bulk of the comments in this common path and
      then refer to it from the other spots.
      Signed-off-by: NDave Hansen <dave.hansen@linux.intel.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: luto@kernel.org
      Cc: bp@alien8.de
      Cc: "H. Peter Anvin" <hpa@zytor.come
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: https://lkml.kernel.org/r/20181012232118.3EAAE77B@viggo.jf.intel.com
      16561f27
    • P
      x86/percpu: Fix this_cpu_read() · b59167ac
      Peter Zijlstra 提交于
      Eric reported that a sequence count loop using this_cpu_read() got
      optimized out. This is wrong, this_cpu_read() must imply READ_ONCE()
      because the interface is IRQ-safe, therefore an interrupt can have
      changed the per-cpu value.
      
      Fixes: 7c3576d2 ("[PATCH] i386: Convert PDA into the percpu section")
      Reported-by: NEric Dumazet <edumazet@google.com>
      Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Acked-by: NEric Dumazet <edumazet@google.com>
      Cc: hpa@zytor.com
      Cc: eric.dumazet@gmail.com
      Cc: bp@alien8.de
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181011104019.748208519@infradead.org
      b59167ac
    • P
      x86/tsc: Force inlining of cyc2ns bits · 4907c68a
      Peter Zijlstra 提交于
      Looking at the asm for native_sched_clock() I noticed we don't inline
      enough. Mostly caused by sharing code with cyc2ns_read_begin(), which
      we didn't used to do. So mark all that __force_inline to make it DTRT.
      
      Fixes: 59eaef78 ("x86/tsc: Remodel cyc2ns to use seqcount_latch()")
      Reported-by: NEric Dumazet <edumazet@google.com>
      Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: hpa@zytor.com
      Cc: eric.dumazet@gmail.com
      Cc: bp@alien8.de
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181011104019.695196158@infradead.org
      4907c68a
  9. 13 10月, 2018 3 次提交
    • V
      KVM: vmx: hyper-v: don't pass EPT configuration info to vmx_hv_remote_flush_tlb() · 5f8bb004
      Vitaly Kuznetsov 提交于
      I'm observing random crashes in multi-vCPU L2 guests running on KVM on
      Hyper-V. I bisected the issue to the commit 877ad952 ("KVM: vmx: Add
      tlb_remote_flush callback support"). Hyper-V TLFS states:
      
      "AddressSpace specifies an address space ID (an EPT PML4 table pointer)"
      
      So apparently, Hyper-V doesn't expect us to pass naked EPTP, only PML4
      pointer should be used. Strip off EPT configuration information before
      calling into vmx_hv_remote_flush_tlb().
      
      Fixes: 877ad952 ("KVM: vmx: Add tlb_remote_flush callback support")
      Signed-off-by: NVitaly Kuznetsov <vkuznets@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      5f8bb004
    • D
      sparc: Throttle perf events properly. · 455adb31
      David S. Miller 提交于
      Like x86 and arm, call perf_sample_event_took() in perf event
      NMI interrupt handler.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      455adb31
    • D
      sparc: Fix single-pcr perf event counter management. · cfdc3170
      David S. Miller 提交于
      It is important to clear the hw->state value for non-stopped events
      when they are added into the PMU.  Otherwise when the event is
      scheduled out, we won't read the counter because HES_UPTODATE is still
      set.  This breaks 'perf stat' and similar use cases, causing all the
      events to show zero.
      
      This worked for multi-pcr because we make explicit sparc_pmu_start()
      calls in calculate_multiple_pcrs().  calculate_single_pcr() doesn't do
      this because the idea there is to accumulate all of the counter
      settings into the single pcr value.  So we have to add explicit
      hw->state handling there.
      
      Like x86, we use the PERF_HES_ARCH bit to track truly stopped events
      so that we don't accidently start them on a reload.
      
      Related to all of this, sparc_pmu_start() is missing a userpage update
      so add it.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cfdc3170
  10. 12 10月, 2018 3 次提交
    • W
      arm64: perf: Reject stand-alone CHAIN events for PMUv3 · ca2b4972
      Will Deacon 提交于
      It doesn't make sense for a perf event to be configured as a CHAIN event
      in isolation, so extend the arm_pmu structure with a ->filter_match()
      function to allow the backend PMU implementation to reject CHAIN events
      early.
      
      Cc: <stable@vger.kernel.org>
      Reviewed-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      ca2b4972
    • W
      arm64: Fix /proc/iomem for reserved but not memory regions · d91680e6
      Will Deacon 提交于
      We describe ranges of 'reserved' memory to userspace via /proc/iomem.
      Commit 50d7ba36 ("arm64: export memblock_reserve()d regions via
      /proc/iomem") updated the logic to export regions that were reserved
      because their contents should be preserved. This allowed kexec-tools
      to tell the difference between 'reserved' memory that must be
      preserved and not overwritten, (e.g. the ACPI tables), and 'nomap'
      memory that must not be touched without knowing the memory-attributes
      (e.g. RAS CPER regions).
      
      The above commit wrongly assumed that memblock_reserve() would not
      be used to reserve regions that aren't memory. It turns out this is
      exactly what early_init_dt_reserve_memory_arch() will do if it finds
      a DT reserved-memory that was also carved out of the memory node, which
      results in a WARN_ON_ONCE() and the region being reserved instead of
      ignored. The ramoops description on hikey and dragonboard-410c both do
      this, so we can't simply write this configuration off as "buggy firmware".
      
      Avoid this issue by rewriting reserve_memblock_reserved_regions() so
      that only the portions of reserved regions which overlap with mapped
      memory are actually reserved.
      
      Fixes: 50d7ba36 ("arm64: export memblock_reserve()d regions via /proc/iomem")
      Reported-by: NJohn Stultz <john.stultz@linaro.org>
      Reported-by: NPaolo Pisati <p.pisati@gmail.com>
      CC: Akashi Takahiro <takahiro.akashi@linaro.org>
      CC: Ard Biesheuvel <ard.biesheuvel@linaro.org>
      Reviewed-by: NJames Morse <james.morse@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      d91680e6
    • P
      vmlinux.lds.h: Fix incomplete .text.exit discards · 8dcf86ca
      Peter Oberparleiter 提交于
      Enabling CONFIG_GCOV_PROFILE_ALL=y causes linker errors on ARM:
      
        `.text.exit' referenced in section `.ARM.exidx.text.exit':
        defined in discarded section `.text.exit'
      
        `.text.exit' referenced in section `.fini_array.00100':
        defined in discarded section `.text.exit'
      
      And related errors on NDS32:
      
        `.text.exit' referenced in section `.dtors.65435':
        defined in discarded section `.text.exit'
      
      The gcov compiler flags cause certain compiler versions to generate
      additional destructor-related sections that are not yet handled by the
      linker script, resulting in references between discarded and
      non-discarded sections.
      
      Since destructors are not used in the Linux kernel, fix this by
      discarding these additional sections.
      Reported-by: NArnd Bergmann <arnd@arndb.de>
      Tested-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Reported-by: NGreentime Hu <green.hu@gmail.com>
      Tested-by: NMasami Hiramatsu <mhiramat@kernel.org>
      Signed-off-by: NPeter Oberparleiter <oberpar@linux.ibm.com>
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      8dcf86ca
  11. 10 10月, 2018 3 次提交
    • D
      sparc: Wire up io_pgetevents system call. · 7c26701a
      David S. Miller 提交于
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7c26701a
    • J
      mm: Preserve _PAGE_DEVMAP across mprotect() calls · 4628a645
      Jan Kara 提交于
      Currently _PAGE_DEVMAP bit is not preserved in mprotect(2) calls. As a
      result we will see warnings such as:
      
      BUG: Bad page map in process JobWrk0013  pte:800001803875ea25 pmd:7624381067
      addr:00007f0930720000 vm_flags:280000f9 anon_vma:          (null) mapping:ffff97f2384056f0 index:0
      file:457-000000fe00000030-00000009-000000ca-00000001_2001.fileblock fault:xfs_filemap_fault [xfs] mmap:xfs_file_mmap [xfs] readpage:          (null)
      CPU: 3 PID: 15848 Comm: JobWrk0013 Tainted: G        W          4.12.14-2.g7573215-default #1 SLE12-SP4 (unreleased)
      Hardware name: Intel Corporation S2600WFD/S2600WFD, BIOS SE5C620.86B.01.00.0833.051120182255 05/11/2018
      Call Trace:
       dump_stack+0x5a/0x75
       print_bad_pte+0x217/0x2c0
       ? enqueue_task_fair+0x76/0x9f0
       _vm_normal_page+0xe5/0x100
       zap_pte_range+0x148/0x740
       unmap_page_range+0x39a/0x4b0
       unmap_vmas+0x42/0x90
       unmap_region+0x99/0xf0
       ? vma_gap_callbacks_rotate+0x1a/0x20
       do_munmap+0x255/0x3a0
       vm_munmap+0x54/0x80
       SyS_munmap+0x1d/0x30
       do_syscall_64+0x74/0x150
       entry_SYSCALL_64_after_hwframe+0x3d/0xa2
      ...
      
      when mprotect(2) gets used on DAX mappings. Also there is a wide variety
      of other failures that can result from the missing _PAGE_DEVMAP flag
      when the area gets used by get_user_pages() later.
      
      Fix the problem by including _PAGE_DEVMAP in a set of flags that get
      preserved by mprotect(2).
      
      Fixes: 69660fd7 ("x86, mm: introduce _PAGE_DEVMAP")
      Fixes: ebd31197 ("powerpc/mm: Add devmap support for ppc64")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NJan Kara <jack@suse.cz>
      Acked-by: NMichal Hocko <mhocko@suse.com>
      Reviewed-by: NJohannes Thumshirn <jthumshirn@suse.de>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      4628a645
    • P
      KVM: x86: support CONFIG_KVM_AMD=y with CONFIG_CRYPTO_DEV_CCP_DD=m · 853c1109
      Paolo Bonzini 提交于
      SEV requires access to the AMD cryptographic device APIs, and this
      does not work when KVM is builtin and the crypto driver is a module.
      Actually the Kconfig conditions for CONFIG_KVM_AMD_SEV try to disable
      SEV in that case, but it does not work because the actual crypto
      calls are not culled, only sev_hardware_setup() is.
      
      This patch adds two CONFIG_KVM_AMD_SEV checks that gate all the remaining
      SEV code; it fixes this particular configuration, and drops 5 KiB of
      code when CONFIG_KVM_AMD_SEV=n.
      Reported-by: NGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      853c1109