- 11 7月, 2016 1 次提交
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由 Thierry Reding 提交于
This seems to have been copied and pasted since the beginning of time, though only until Tegra124, likely because that DT was written from scratch or it was fixed along the way. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 12 4月, 2016 2 次提交
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由 Jon Hunter 提交于
For Tegra boards, the device-tree alias serial0 is used for the console and so add the stdout-path information so that the console no longer needs to be passed via the kernel boot parameters. This has been tested on boards, tegra20-trimslice, tegra30-beaver, tegra114-dalmore and tegra124-jetson-tk1. Signed-off-by: NJon Hunter <jonathanh@nvidia.com> Acked-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Sudeep Holla 提交于
Though the keyboard and other driver will continue to support the legacy "gpio-key,wakeup", "nvidia,wakeup-source" boolean property to enable the wakeup source, "wakeup-source" is the new standard binding. This patch replaces all the legacy wakeup properties with the unified "wakeup-source" property in order to avoid any further copy-paste duplication. Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 13 11月, 2014 1 次提交
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由 Olof Johansson 提交于
There are general changes pending to make the /aliases/serial* entries number the serial ports on the system. On Tegra, so far the ports have been just numbered dynamically as they are configured so that makes them change. To avoid this, add specific aliases per board to keep the old numbers. This allows us to change the numbering by default on future SoCs while keeping the numbering on existing boards. Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 19 12月, 2013 1 次提交
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由 Stephen Warren 提交于
This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 17 12月, 2013 4 次提交
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由 Laxman Dewangan 提交于
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra20 platforms. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Laxman Dewangan 提交于
Use key code macros for all key code refernced for keys. For tegra20-seaboard.dts and tegra20-harmony.dts: The key comment for key (16th row and 1st column) is KEY_KPSLASH but code is 0x004e which is the key code for KEY_KPPLUS. As there other key exist with KY_KPPLUS, I am assuming key code is wrong and comment is fine. With this assumption, I am keeping the key code as KEY_KPSLASH. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
For Tegra DT files, I've been attempting to keep the nodes sorted in the order: 1) Nodes with reg, in order of reg. 2) Nodes without reg, alphabetically. This patch fixes a few escapees that I missed:-( The diffs look larger than they really are, because sometimes when one node was moved up or down, diff chose to represent this as many other nodes being moved the other way! Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 22 8月, 2013 1 次提交
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由 Stephen Warren 提交于
This fixes a regression exposed during the merge window by commit 9f310ded "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that USB VBUS doesn't get turned on, so USB devices are not detected. This affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to which the SSD is connected) and the external port(s) on Seaboard/ Springbank and Whistler. The Tegra DT as written in v3.11 allows two paths to enable USB VBUS: 1) Via the legacy DT binding for the USB controller; it can directly acquire a VBUS GPIO and activate it. 2) Via a regulator for VBUS, which is referenced by the new DT binding for the USB controller. Those two methods both use the same GPIO, and hence whichever of the USB controller and regulator gets probed first ends up owning the GPIO. In practice, the USB driver only supports path (1) above, since the patches to support the new USB binding are not present until v3.12:-( In practice, the regulator ends up being probed first and owning the GPIO. Since nothing enables the regulator (the USB driver code is not yet present), the regulator ends up being turned off. This originally caused no problem, because the polarity in the regulator definition was incorrect, so attempting to turn off the regulator actually turned it on, and everything worked:-( However, when testing the new USB driver code in v3.12, I noticed the incorrect polarity and fixed it in commit 9f310ded "ARM: tegra: fix VBUS regulator GPIO polarity in DT". In the context of v3.11, this patch then caused the USB VBUS to actually turn off, which broke USB ports with VBUS control. I got this patch included in v3.11-rc1 since it fixed a bug in device tree (incorrect polarity specification), and hence was suitable to be included early in the rc series. I evidently did not test the patch at all, or correctly, in the context of v3.11, and hence did not notice the issue that I have explained above:-( Fix this by making the USB VBUS regulators always enabled. This way, if the regulator owns the GPIO, it will always be turned on, even if there is no USB driver code to request the regulator be turned on. Even ignoring this bug, this is a reasonable way to configure the HW anyway. If this patch is applied to v3.11, it will cause a couple pretty trivial conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since the context right above the added lines changed in patches destined for v3.12. Reported-by: NKyle McMartin <kmcmarti@redhat.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 13 8月, 2013 1 次提交
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由 Joseph Lo 提交于
Enabling the LP1 suspend mode for Tegra devices. Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 7月, 2013 1 次提交
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由 Mikko Perttunen 提交于
USB VBUS regulators are now specified with the vbus-supply property instead of nvidia,vbus-gpio, so remove the obsolete properties. The equivalent vbus-supply properties were already added in patch "ARM: tegra: update device trees for USB binding rework". Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 03 7月, 2013 1 次提交
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由 Stephen Warren 提交于
Commit 4c94c8b5 "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 29 5月, 2013 4 次提交
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由 Hiroshi Doyu 提交于
Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 18 5月, 2013 1 次提交
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由 Venu Byravarasu 提交于
This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 05 4月, 2013 5 次提交
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由 Prashant Gaikwad 提交于
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
Adding KBC as a wakeup source for Whistler board. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 04 4月, 2013 1 次提交
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由 Joseph Lo 提交于
Adding the bindings of the clock source of PMC in DT. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 3月, 2013 1 次提交
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由 Joseph Lo 提交于
The GPIO pin of SD slot card detection should active low. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 1月, 2013 3 次提交
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由 Lucas Stach 提交于
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: NLucas Stach <dev@lynxeye.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Laxman Dewangan 提交于
Enable Tegra based keyboard controller and populate the key mapping for Whistler. With this patch, HOME, BACK, POWER and MENU keys will work. Still other keys which are in ROW3 and ROW4 will not work as it conflicts with KBC pins on SDIO2 pinmux. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Bryan Wu 提交于
Use engineering name 'Tegra20' instead of 'Tegra2' Signed-off-by: NBryan Wu <pengw@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 17 11月, 2012 1 次提交
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由 Stephen Warren 提交于
Enable host1x, and the HDMI output. Whistler also has a DSI-based LCD, and a VGA output. tegradrm doesn't support either of those output types yet. Based on work by Thierry Reding for TrimSlice. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 06 11月, 2012 1 次提交
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由 Stephen Warren 提交于
Commit 13511def "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 20 9月, 2012 1 次提交
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由 Stephen Warren 提交于
Add DT property to tell the MAX8907 that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 9月, 2012 1 次提交
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由 Stephen Warren 提交于
Whistler uses a Maxim 8907 regulator. Instantiate this. The voltage settings were derived from the schematic. The only exception is the BBAT voltage; the schematic says 1.2v, but the HW can't go that low, so use the HW default of 2.4v instead. Almost all regulators list all driven supply signal names in their regulator-names property. The exception is nvvdd_sv3, which is in turn named 12 more different names on the schematic, so these were omitted for brevity. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 7月, 2012 1 次提交
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由 Stephen Warren 提交于
Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 21 6月, 2012 1 次提交
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由 Stephen Warren 提交于
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 15 5月, 2012 5 次提交
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由 Stephen Warren 提交于
In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Ensure that all Tegraa GPIO specifiers contain a comment indicating which GPIO name the number refers to. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Consistently don't place a space after < or before >. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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- 04 5月, 2012 1 次提交
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由 Stephen Warren 提交于
* Add node for the audio codec * Enable Tegra's I2S1 controller and DAS * Add node for top-level sound complex Signed-off-by: NStephen Warren <swarren@nvidia.com>
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