1. 15 5月, 2008 5 次提交
    • H
      [IA64] trivial cleanup for entry.S · 2e513fe4
      Hidetoshi Seto 提交于
      This patch does:
       - make comment at next to resched check more robust
       - move "re-check" comments to next to where change predicate regs
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      2e513fe4
    • H
      [IA64] fix interrupt masking for pending works on kernel leave · 3633c730
      Hidetoshi Seto 提交于
      [Bug-fix for "[BUG?][2.6.25-mm1] sleeping during IRQ disabled"]
      
      This patch does:
       - enable interrupts before calling schedule() as same as others, ex. x86
       - enable interrupts during ia64_do_signal() and ia64_sync_krbs()
       - do_notify_resume_user() is still called with interrupts disabled, since
         we can take short path of fsys_mode if-statement quickly.
       - pfm_handle_work() is also called with interrupts disabled, since
         it can deal interrupt mask within itself.
       - fix/add some comments/notes
      Reported-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      3633c730
    • A
      [IA64] allow user to force_pal_cache_flush · f13ae30e
      Alex Chiang 提交于
      The sequence executed in check_sal_cache_flush:
      
      	- pend a timer interrupt
      	- call SAL_CACHE_FLUSH
      	- see if interrupt is still pending
      
      can hang HP machines with buggy SAL_CACHE_FLUSH implementations.
      
      Provide a kernel command-line argument to allow users skip this
      check if desired. Using this parameter will force ia64_sal_cache_flush
      to call ia64_pal_cache_flush() instead of SAL_CACHE_FLUSH.
      Signed-off-by: NAlex Chiang <achiang@hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      f13ae30e
    • B
      [IA64] Don't reserve crashkernel memory > 4 GB · 8a3360f0
      Bernhard Walle 提交于
      Some IA64 machines map all cell-local memory above 4 GB (32 bit limit).
      However, in most cases, the kernel needs some memory below that limit that is
      DMA-capable. So in this machine configuration, the crashkernel will be reserved
      above 4 GB.
      
      For machines that use SWIOTLB implementation because they lack an I/O MMU
      the low memory is required by the SWIOTLB implementation. In that case,
      it doesn't make sense to reserve the crashkernel at all because it's unusable
      for kdump.
      
      A special case is the "hpzx1" machine vector. In theory, it has a I/O MMU, so
      it can be booted above 4 GB. However, in the kdump case that is not possible
      because of changeset 51b58e3e:
      
          On HP zx1 machines, the 'machvec=dig' parameter is needed for the kdump
          kernel to avoid problems with the HP sba iommu.  The problem is that during
          the boot of the kdump kernel, the iommu is re-initialized, so in-flight DMA
          from improperly shutdown drivers causes an IOTLB miss which leads to an
          MCA.  With kdump, the idea is to get into the kdump kernel with as little
          code as we can, so shutting down drivers properly is not an option.
      
          The workaround is to add 'machvec=dig' to the kdump kernel boot parameters.
          This makes the kdump kernel avoid using the sba iommu altogether, leaving
          the IOTLB intact.  Any ongoing DMA falls harmlessly outside the kdump
          kernel.  After the kdump kernel reboots, all devices will have been
          shutdown properly and DMA stopped.
      
      This patch pushes that functionality into the sba iommu initialization
      code, so that users won't have to find the obscure documentation telling
      them about 'machvec=dig'.
      
      This means that also for hpzx1 it's not possible to boot when all
      memory is above the 4 GB limit. So the only machine vectors that can handle
      this case are "sn2" and "uv".
      Signed-off-by: NBernhard Walle <bwalle@suse.de>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      8a3360f0
    • J
      [IA64] machvec support for SGI UV platform · 22246614
      Jack Steiner 提交于
      This patch adds the basic IA64 machvec infrastructure to support
      the SGI "UV" platform.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      22246614
  2. 14 5月, 2008 7 次提交
    • R
      x86: user_regset_view table fix for ia32 on 64-bit · 1f465f4e
      Roland McGrath 提交于
      The user_regset_view table for the 32-bit regsets on the 64-bit build had
      the wrong sizes for the FP regsets.  This bug had no user-visible effect
      (just on kernel modules using the user_regset interfaces and the like).
      But the fix is trivial and risk-free.
      Signed-off-by: NRoland McGrath <roland@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1f465f4e
    • P
      x86: arch/x86/mm/pat.c - fix warning · afc85343
      Pranith Kumar 提交于
      fix this warning:
      
       arch/x86/mm/pat.c: In function `phys_mem_access_prot_allowed':
       arch/x86/mm/pat.c:558: warning: long long unsigned int format, long
       unsigned int arg (arg 6)
       arch/x86/mm/pat.c: In function `map_devmem':
       arch/x86/mm/pat.c:580: warning: long long unsigned int format, long
       unsigned int arg (arg 6)
      Signed-off-by: ND Pranith Kumar <bobby.prani@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      afc85343
    • I
      x86: fix csum_partial() export · 89804c02
      Ingo Molnar 提交于
      Fix this symbol export problem:
      
          Building modules, stage 2.
          MODPOST 193 modules
          ERROR: "csum_partial" [fs/reiserfs/reiserfs.ko] undefined!
          make[1]: *** [__modpost] Error 1
          make: *** [modules] Error 2
      
      This is due to a known weakness of symbol exports: if a symbol's
      only in-core user is an EXPORT_SYMBOL from a lib-y section, the
      symbol is not linked in.
      
      The solution is to move the export to x8664_ksyms_64.c - but the real
      solution would be to fix kbuild.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      89804c02
    • A
      x86: early_init_centaur(): use set_cpu_cap() · 8c45a4e4
      Andrew Morton 提交于
      arch/x86/kernel/setup_64.c:954: warning: passing argument 2 of 'set_bit' from incompatible pointer type
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8c45a4e4
    • H
      x86: fix app crashes after SMP resume · 61165d7a
      Hugh Dickins 提交于
      After resume on a 2cpu laptop, kernel builds collapse with a sed hang,
      sh or make segfault (often on 20295564), real-time signal to cc1 etc.
      
      Several hurdles to jump, but a manually-assisted bisect led to -rc1's
      d2bcbad5 x86: do not zap_low_mappings
      in __smp_prepare_cpus.  Though the low mappings were removed at bootup,
      they were left behind (with Global flags helping to keep them in TLB)
      after resume or cpu online, causing the crashes seen.
      
      Reinstate zap_low_mappings (with local __flush_tlb_all) for each cpu_up
      on x86_32.  This used to be serialized by smp_commenced_mask: that's now
      gone, but a low_mappings flag will do.  No need for native_smp_cpus_done
      to repeat the zap: let mem_init zap BSP's low mappings just like on UP.
      
      (In passing, fix error code from native_cpu_up: do_boot_cpu returns a
      variety of diagnostic values, Dprintk what it says but convert to -EIO.
      And save_pg_dir separately before zap_low_mappings: doesn't matter now,
      but zapping twice in succession wiped out resume's swsusp_pg_dir.)
      
      That worked well on the duo and one quad, but wouldn't boot 3rd or 4th
      cpu on P4 Xeon, oopsing just after unlock_ipi_call_lock.  The TLB flush
      IPI now being sent reveals a long-standing bug: the booting cpu has its
      APIC readied in smp_callin at the top of start_secondary, but isn't put
      into the cpu_online_map until just before that unlock_ipi_call_lock.
      
      So native_smp_call_function_mask to online cpus would send_IPI_allbutself,
      including the cpu just coming up, though it has been excluded from the
      count to wait for: by the time it handles the IPI, the call data on
      native_smp_call_function_mask's stack may well have been overwritten.
      
      So fall back to send_IPI_mask while cpu_online_map does not match
      cpu_callout_map: perhaps there's a better APICological fix to be
      made at the start_secondary end, but I wouldn't know that.
      Signed-off-by: NHugh Dickins <hugh@veritas.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      61165d7a
    • V
      x86/PCI: X86_PAT & mprotect · 77db9885
      Venki Pallipadi 提交于
      Some versions of X used the mprotect workaround to change caching type from UC
      to WB, so that it can then use mtrr to program WC for that region [1].  Change
      the mmap of pci space through /sys or /proc interfaces from UC to UC_MINUS.
      With this change, X will not need to use mprotect workaround to get WC type
      since the MTRR mapping type will be honored.
      
      The bug in mprotect that clobbers PAT bits is fixed in a follow on patch. So,
      this X workaround will stop working as well.
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      77db9885
    • T
      x86/PCI: fix broken ISA DMA · 4a367f3a
      Takashi Iwai 提交于
      Rene Herman reported:
      
      > commit 8779f2fc
      >
      > "x86: don't try to allocate from DMA zone at first"
      >
      > breaks all of ISA DMA. Or all of ALSA ISA DMA at least. All
      > ISA soundcards are silent following that commit -- no error
      > messages, everything appears fine, just silence.
      
      That patch is buggy. We had an implicit assumption that
      dev = NULL for ISA devices that require 24bit DMA.
      
      The recent work on x86 dma_alloc_coherent() breaks the ISA DMA buffer
      allocation, which is represented by "dev = NULL" and requires 24bit
      DMA implicitly.
      Bisected-by: NRene Herman <rene.herman@keyaccess.nl>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      4a367f3a
  3. 13 5月, 2008 21 次提交
  4. 12 5月, 2008 7 次提交