1. 11 3月, 2016 4 次提交
  2. 24 2月, 2016 6 次提交
  3. 23 2月, 2016 1 次提交
    • A
      arc: get rid of DEVTMPFS dependency on INITRAMFS_SOURCE · 3e5177c1
      Alexey Brodkin 提交于
      Even though DEVTMPFS is required when our pre-built initramfs
      is used it is not the case in general. It is perfectly possible
      to use initramfs with device nodes already populated or there
      could be other usages, see discussion below for more detials:
      http://thread.gmane.org/gmane.comp.embedded.openwrt.devel/37819/focus=37821
      
      This change removes mentioned dependency from arch/arc/Kconfig
      updating instead those defconfigs that are usually used with this
      kind of pre-build initramfs.
      
      And while at it all touched defconfigs were regenerated via
      savedefconfig and some options were removed:
       * USB is selected by other options implicitly
       * VGA_CONSOLE is disableb for ARC since
         031e29b5
       * EXT3_FS automatically selects EXT4_FS
       * MTDxxx and JFFS2_FS make no sense for AXS because
         AXS NAND controller is not upstreamed
       * NET_OSCI_LAN is not in upstream as well
       * ARCPGU_xxx options make no sense because ARC PGU is not yet
         in upstream and when it gets there all config options would
         be taken from devicetree
      Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      3e5177c1
  4. 18 2月, 2016 3 次提交
  5. 12 2月, 2016 1 次提交
    • V
      ARC: mm: Introduce explicit super page size support · 37eda9df
      Vineet Gupta 提交于
      MMUv4 supports 2 concurrent page sizes: Normal and Super [4K to 16M]
      
      So far Linux supported a single super page size for a given Normal page,
      depending on the software page walking address split.
      e.g. we had 11:8:13 address split for 8K page, which meant super page
      was 2 ^(8+13) = 2M (given that THP size has to be PMD_SHIFT)
      
      Now we turn this around, by allowing multiple Super Pages in Kconfig
      (currently 2M and 16M only) and forcing page walker address split to
      PGDIR_SHIFT and PAGE_SHIFT
      
      For configs without Super page, things are same as before and
      PGDIR_SHIFT can be hacked to get non default address split
      
      The motivation for this change is a customer who needs 16M super page
      and a 8K Normal page combo.
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      37eda9df
  6. 10 2月, 2016 1 次提交
    • V
      ARCv2: intc: Allow interruption by lowest priority interrupt · dec2b284
      Vineet Gupta 提交于
      ARC HS Cores support configurable multiple interrupt priorities of upto
      16 levels.
      
      There is processor "interrupt preemption threshhold" in STATUS32.E[4:1]
      And several places need to set this up:
      1. seed value as kernel is booting
      2. seed value for user space programs
      3. Arg to SLEEP instruction in idle task (what interrupt prio can wake)
      4. Per-IRQ line prioirty (i.e. what is the priority of interrupt
         raised by a peripheral or timer or perf counter...
      
      Currently above sites use the highest priority 0. This can be potential
      problem when multiple priorities are supported. e.g. user space could
      only be interrupted by P0 interrupt, not others...
      So turn this over and instead make default interruption level to be
      the lowest priority possible 15. This should be fine even if there are
      fewer priority levels configured (say two: P0 HIGH, P1 LOW)
      
      This feature also effectively disables FIRQ feature if present in
      hardware config. With old code, a P0 interrupt would be FIRQ, needing
      special handling (ISR or Register Banks) which is NOT supported yet.
      Now it not be P0 (P15 or whatever is lowest prio) so FIRQ is not
      triggered.
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      dec2b284
  7. 29 1月, 2016 3 次提交
  8. 22 1月, 2016 1 次提交
    • V
      ARCv2: STAR 9000950267: Handle return from intr to Delay Slot #2 · cbfe74a7
      Vineet Gupta 提交于
      Returning to delay slot, riding an interrupti, had one loose end.
      AUX_USER_SP used for restoring user mode SP upon RTIE was not being
      setup from orig task's saved value, causing task to use wrong SP,
      leading to ProtV errors.
      
      The reason being:
       - INTERRUPT_EPILOGUE returns to a kernel trampoline, thus not expected to restore it
       - EXCEPTION_EPILOGUE is not used at all
      
      Fix that by restoring AUX_USER_SP explicitly in the trampoline.
      
      This was broken in the original workaround, but the error scenarios got
      reduced considerably since v3.14 due to following:
      
       1. The Linuxthreads.old based userspace at the time caused many more
          exceptions in delay slot than the current NPTL based one.
          Infact with current userspace the error doesn't happen at all.
      
       2. Return from interrupt (delay slot or otherwise) doesn't get exercised much
          after commit 4de0e528 ("Really Re-enable interrupts to avoid deadlocks")
          since IRQ_ACTIVE.active being clear means most returns are as if from pure
          kernel (even for active interrupts)
      
      Infact the issue only happened in an experimental branch where I was tinkering with
      reverted 4de0e528
      
      Cc: stable@kernel.org # v4.2+
      Fixes: 4255b07f ("ARCv2: STAR 9000793984: Handle return from intr to Delay Slot")
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      cbfe74a7
  9. 21 1月, 2016 2 次提交
  10. 17 1月, 2016 1 次提交
  11. 16 1月, 2016 1 次提交
  12. 21 12月, 2015 6 次提交
    • V
      ARC: dw2 unwind: Catch Dwarf SNAFUs early · 6b538db7
      Vineet Gupta 提交于
      Instead of seeing empty stack traces, let kernel fail early so dwarf
      issues can be fixed sooner
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      6b538db7
    • V
      ARC: dw2 unwind: Don't bail for CIE.version != 1 · 6d0d5060
      Vineet Gupta 提交于
      The rudimentary CIE.version == 3 handling is already present in code
      (for return address register specification)
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      6d0d5060
    • V
      Revert "ARC: dw2 unwind: Ignore CIE version !=1 gracefully instead of bailing" · 2d64affc
      Vineet Gupta 提交于
      Blingly ignoring CIE.version != 1 was a bad idea.
      It still leaves "desirability" when running perf with callgraphing where libgcc
      symbols might show in hotspot.
      
      More importantly, basic CIE.version == 3 support already exists in code:
      
      |
      |   retAddrReg = state.version <= 1 ? *ptr++ : get_uleb128(&ptr, end);
      |
      
      Next commit with simply add continue-not-bail for CIE.version != 1
      
      This reverts commit 323f41f9.
      2d64affc
    • V
      ARC: Fix linking errors with CONFIG_MODULE + CONFIG_CC_OPTIMIZE_FOR_SIZE · 07fd7d4b
      Vineet Gupta 提交于
      At -Os, ARC gcc generates millicode thunk for function prologue/epilogue,
      which are served by libgcc.
      
      Modules historically are NOT linked with libgcc to avoid code bloat, reducing
      runtime relocation fixups etc. I even once tried doing that but got lost
      in makefile intricacies.
      
      This means modules at -Os don't get the millicode thunks, causing build
      failures below:
      
      | MODPOST 5 modules
      | ERROR: "__ld_r13_to_r18" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__ld_r13_to_r18_ret" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__st_r13_to_r18" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__ld_r13_to_r17_ret" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__st_r13_to_r17" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__ld_r13_to_r16_ret" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__st_r13_to_r16" [crypto/sha256_generic.ko] undefined!
      |....
      |....
      
      Workaround that by inhibiting millicode thunks for loadable modules
      
      Fixes STAR 9000641864:
      ("Linux built with optimizations for size emits errors for modules")
      Reported-by: NAnton Kolesov <akolesov@synosys.com>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      07fd7d4b
    • A
      ARC: mm: fix building for MMU v2 · 4b32e89a
      Alexey Brodkin 提交于
      ARC700 cores with MMU v2 don't have IC_PTAG AUX register and so we only
      define ARC_REG_IC_PTAG for MMU versions >= 3.
      
      But current implementation of cache_line_loop_vX() routines assumes
      availability of all of them (v2, v3 and v4) simultaneously.
      
      And given undefined ARC_REG_IC_PTAG if CONFIG_MMU_VER=2 we're seeing
      compilation problem:
      ---------------------------------->8-------------------------------
        CC      arch/arc/mm/cache.o
      arch/arc/mm/cache.c: In function '__cache_line_loop_v3':
      arch/arc/mm/cache.c:270:13: error: 'ARC_REG_IC_PTAG' undeclared (first use in this function)
         aux_tag = ARC_REG_IC_PTAG;
                   ^
      arch/arc/mm/cache.c:270:13: note: each undeclared identifier is reported only once for each function it appears in
      scripts/Makefile.build:258: recipe for target 'arch/arc/mm/cache.o' failed
      ---------------------------------->8-------------------------------
      
      The simples fix is to have ARC_REG_IC_PTAG defined regardless MMU
      version being used.
      
      We don't use it in cache_line_loop_v2() anyways so who cares.
      Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      4b32e89a
    • V
      ARC: mm: HIGHMEM: Fix section mismatch splat · 899cfd2b
      Vineet Gupta 提交于
      | WARNING: vmlinux.o(.text+0xd6c2): Section mismatch in reference from the function alloc_kmap_pgtable() to the function
      | .init.text:__alloc_bootmem_low()
      The function alloc_kmap_pgtable() references the function __init __alloc_bootmem_low().
      This is often because alloc_kmap_pgtable lacks a __init annotation or the annotation of __alloc_bootmem_low is wrong.
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      899cfd2b
  13. 17 12月, 2015 5 次提交
  14. 12 12月, 2015 4 次提交
    • V
      c512c6ba
    • V
      ARCv2: perf: Ensure perf intr gets enabled on all cores · c6317bc7
      Vineet Gupta 提交于
      This was the second perf intr issue
      
      perf sampling on multicore requires intr to be enabled on all cores.
      ARC perf probe code used helper arc_request_percpu_irq() which calls
       - request_percpu_irq() on core0
       - enable_percpu_irq() on all all cores (including core0)
      
      genirq requires that request be made ahead of enable call.
      However if perf probe happened on non core0 (observed on a 3.18 kernel),
      enable would get called ahead of request, failing obviously and
      rendering perf intr disabled on all such cores
      
      [   11.120000] 1 ARC perf       : 8 counters (48 bits), 113 conditions, [overflow IRQ support]
      [   11.130000] 1 -----> enable_percpu_irq() IRQ 20 failed
      [   11.140000] 3 -----> enable_percpu_irq() IRQ 20 failed
      [   11.140000] 2 -----> enable_percpu_irq() IRQ 20 failed
      [   11.140000] 0 =====> request_percpu_irq() IRQ 20
      [   11.140000] 0 -----> enable_percpu_irq() IRQ 20
      
      Fix this fragility, by calling request_percpu_irq() on whatever core
      calls probe (there is no requirement on which core calls this anyways)
      and then calling enable on each cores.
      
      Interestingly this started as invesigation of STAR 9000838902:
      "sporadically IRQs enabled on perf prob"
      
      which was about occassional boot spew as request_percpu_irq got called
      non-locally (from an IPI), and re-enabled interrupts in following path
      proc_mkdir ->  spin_unlock_irq()
      
      which the irq work code didn't like.
      
      | ARC perf     : 8 counters (48 bits), 113 conditions, [overflow IRQ support]
      |
      | BUG: failure at ../kernel/irq_work.c:135/irq_work_run_list()!
      | CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.18.10-01127-g285efb8e66d1 #2
      |
      | Stack Trace:
      |  arc_unwind_core.constprop.1+0x94/0x104
      |  dump_stack+0x62/0x98
      |  irq_work_run_list+0xb0/0xb4
      |  irq_work_run+0x22/0x3c
      |  do_IPI+0x74/0x9c
      |  handle_irq_event_percpu+0x34/0x164
      |  handle_percpu_irq+0x58/0x78
      |  generic_handle_irq+0x1e/0x2c
      |  arch_do_IRQ+0x3c/0x60
      |  ret_from_exception+0x0/0x8
      
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-snps-arc@lists.infradead.org
      Cc: linux-kernel@vger.kernel.org
      Cc: Alexey Brodkin <abrodkin@synopsys.com>
      Cc: <stable@vger.kernel.org> #4.2+
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      c6317bc7
    • V
      ARC: intc: No need to clear IRQ_NOAUTOEN · 5bf704c2
      Vineet Gupta 提交于
      arc_request_percpu_irq() is called by all cores to request/enable percpu
      irq. It has some "prep" calls needed by genirq:
       - setup percpu devid
       - disable IRQ_NOAUTOEN
      
      However given that enable_percpu_irq() is called enayways, latter can be
      avoided.
      
      We are now left with irq_set_percpu_devid() quirk and that too for
      ARCompact builds only, since previous patch updated ARCv2 intc to do this
      in the "right" place, i.e. irq map function.
      
      By next release, this will ultimately be fixed for ARCompact as well.
      
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Alexey Brodkin <abrodkin@synopsys.com>
      Cc: linux-snps-arc@lists.infradead.org
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      5bf704c2
    • V
      ARCv2: intc: Fix random perf irq disabling in SMP setup · 8eb0984b
      Vineet Gupta 提交于
      As part of fixing another perf issue, observed that after a perf run,
      the interrupt got disabled on one/more cores.
      
      Turns out that despite requesting perf irq as percpu, the flow handler
      registered was not handle_percpu_irq()
      
      Given that on ARCv2 cores, IRQs < 24 are always private to cpu, we
      register the right handler at the very onset.
      
      Before Fix
      
      | [ARCLinux]# cat /proc/interrupts | grep perf
      |  20:    0      0      0       0  ARCv2 core Intc  20 ARC perf counters
      |
      | [ARCLinux]# perf record -c 20000 /sbin/hackbench
      | Running with 10*40 (== 400) tasks.
      |
      | [ARCLinux]# cat /proc/interrupts | grep perf
      |  20:    0    522      8    51916  ARCv2 core Intc  20 ARC perf counters
      |
      | [ARCLinux]# perf record -c 20000 /sbin/hackbench
      | Running with 10*40 (== 400) tasks.
      |
      | [ARCLinux]# cat /proc/interrupts | grep perf
      |  20:    0    522      8   104368  ARCv2 core Intc  20 ARC perf counters
      
      After Fix
      
      | [ARCLinux]# cat /proc/interrupts | grep perf
      |  20:    0      0      0       0  ARCv2 core Intc  20 ARC perf counters
      |
      | [ARCLinux]# perf record -c 20000 /sbin/hackbench
      | Running with 10*40 (== 400) tasks.
      |
      | [ARCLinux]# cat /proc/interrupts | grep perf
      |  20:  64198  62012  62697  67803  ARCv2 core Intc  20 ARC perf counters
      |
      | [ARCLinux]# perf record -c 20000 /sbin/hackbench
      | Running with 10*40 (== 400) tasks.
      |
      | [ARCLinux]# cat /proc/interrupts | grep perf
      |  20: 126014 122792 123301 133654  ARCv2 core Intc  20 ARC perf counters
      
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Alexey Brodkin <abrodkin@synopsys.com>
      Cc: stable@vger.kernel.org #4.2+
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      8eb0984b
  15. 07 12月, 2015 1 次提交