- 17 8月, 2014 1 次提交
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Define the Koelsch board dependent part of the VIN1 device node. Add the device node for Analog Devices ADV7180 video decoder to I2C2 bus. Add the necessary subnodes to interconnect VIN1 and ADV7180 devices. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 08 7月, 2014 1 次提交
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由 Sergei Shtylyov 提交于
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to them. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NArnd Bergmann <arnd@arndb.de> [horms+renesas@verge.net.au: minor witespace changes] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 17 6月, 2014 4 次提交
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由 Phil Edworthy 提交于
Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
A second i2c6 node was a added by 05e234a187058ee ("ARM: shmobile: koelsch dts: Add VDD MPU regulator for DVFS"). Merge this into the existing node. Also shuffle i2c nodes so they are all together. Cc: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Gaku Inami 提交于
Add needed information inside CPU0 for the generic cpufreq-cpu0 driver. - voltage-tolerance = 1% It reflects the tolerance for the CPU voltage defined inside the OPP table. Due to the lack of proper OPP definition, use an arbitrary safe value. - clock-latency = 300 us Approximate worst-case latency to do a full DVFS transition for every OPPs. Due to the lack of HW information, use an arbitrary safe value. Note: The term transition-latency will be more accurate to define this value since the clock transition latency is not the only parameter that will define the overall DVFS transition. - operating-points = < kHz - uV > List of 6 operating points. All of them are using the same voltage since DVS is not supported in R-CAR Gen2. - clocks phandle to the CPU clock source. This clock source is used for all the 2 CortexA15 located inside the same cluster. Signed-off-by: NGaku Inami <gaku.inami.xw@bp.renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Gaku Inami 提交于
The CA15 cluster is capable of voltage scaling. Add the regulator in the i2c6 node, to allow the generic CPUFreq driver to use it. Enable the i2c6 pin mux and the device node as well since the da9210 is connected to that bus. Note: In R-CAR Gen2, each frequency is using the same voltage, and DVS control is not used. Therefore, this patch set the voltage(Vmin/Vmax) to 1000mv. Signed-off-by: NGaku Inami <gaku.inami.xw@bp.renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 5月, 2014 1 次提交
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由 Laurent Pinchart 提交于
SCIF0 and SCIF1 are used as debug serial ports. Enable them and configure pinmuxing appropriately. We can now remove the clkdev registration hack for SCIF devices from the Koelsch reference board file. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [horms+renesas@verge.net.au: added aliases to avoid device renumbering] [horms+renesas@verge.net.au: resolved conflicts] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 4月, 2014 2 次提交
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Fix typo of renesas,groups in the koeslch dt. The kernel has no renesas,gpios but this should match renesas,groups. Noticed thanks to similar fix for Lager by Rob Taylor and Ben Dooks. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 4月, 2014 6 次提交
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <wsa@sang-engineering.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Wolfram Sang 提交于
This node should have a unique name so it can be distinguished when other i2c busses are added later. Signed-off-by: NWolfram Sang <wsa@sang-engineering.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The Koelsch board uses the ethernet PHY LED0 as a link signal connected to the ethernet controller. Specify the corresponding LED mode for the PHY. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add DTS gpio-keys support for SW2 on the Koelsch board. This makes the DT code match the legacy board code. Also update the existing gpio-keys nodes to make use of KEY_n. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add pinctrl and SPI device for MSIOF on Koelsch. On this board, only MSIOF0 is in use. Its bus contains a single device (a Renesas R2A11302FT PMIC), for which no bindings are defined yet. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Prepare for the advent of MSIOF SPI, which will be spi1 to spi3. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 26 2月, 2014 1 次提交
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由 Magnus Damm 提交于
Add DT support for SDHI0, SDHI1 and SDHI2 on Koelsch. The board specific handling of CD and WP pins are using GPIOs. SDHI0 and SDHI1 are hooked up to regular SD connectors while SDHI2 is using micro-SD which is lacking WP signal. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 25 2月, 2014 1 次提交
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由 Sergei Shtylyov 提交于
Define the Koelsch board dependent part of the Ether device node. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 18 2月, 2014 1 次提交
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <wsa@sang-engineering.com> Acked-by: NMagnus Damm <damm@opensource.se> [horms+renesas@verge.net.au: resolved conflict] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 17 2月, 2014 1 次提交
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由 Laurent Pinchart 提交于
The DU device has no DT bindings yet, instantiate it as a platform device for now. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NMagnus Damm <damm@opensource.se> [horms+renesas@verge.net.au: broken out of larger patch that included board changes] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 2月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
Add pinctrl and SPI devices for QSPI on Koelsch. Add Spansion s25fl512s SPI FLASH and MTD partitions. Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 2月, 2014 3 次提交
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由 Valentine Barshak 提交于
This enables SATA0 in Koelsch device tree. SATA1 is not available on Koelsch since its pinmux configuration is fixed to PCIe. Signed-off-by: NValentine Barshak <valentine.barshak@cogentembedded.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Takashi Yoshii 提交于
Fix dts to have memory 1GiB @ 0_4000_0000 + 1GiB @ 2_0000_0000 according to Koelsch's hardware manual. Signed-off-by: NTakashi Yoshii <takasi-y@ops.dti.ne.jp> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The Koelsh reference device tree is going away, copy the missing GPIO keys device node to the Koeslch device tree file. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 19 12月, 2013 2 次提交
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由 Laurent Pinchart 提交于
The external crystal frequency is 20MHz on the Koelsch board. Specify it in the device tree. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Copy the device nodes from Koelsch reference into the Koeslch device tree file. This will allow us to use a single DTS file regarless of kernel configuration. In case of legacy C board code the device nodes may or may not be used, but in the multiplatform case all the DT device nodes are used. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 10 12月, 2013 1 次提交
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由 Laurent Pinchart 提交于
In order to allow usage of the preprocessor in the SoC device tree sources, switch from /include/ to #include. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 30 9月, 2013 1 次提交
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由 Hisashi Nakamura 提交于
Koelsch base board support making use of 2 GiB of memory, the r8a7791 SoC with the SCIF0 serial port and CA15 with CMT timer. Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: NRyo Kataoka <ryo.kataoka.wt@renesas.com> [damm@opensource.se: Forward ported to upstream, dropped not-yet-ready SMP/PFC] Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 8月, 2013 1 次提交
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由 Simon Horman 提交于
Now that Ether support has been added to the lager board it is possible to use nfsroot. This configuration is in line with that of other shmobile boards. Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 05 8月, 2013 1 次提交
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由 Laurent Pinchart 提交于
The shmobile DT files available in the kernel are reference implementations intended to be used as sample code, as well as for development. As such, it makes sense to mount the root file system in read/write mode by default. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 03 4月, 2013 1 次提交
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由 Magnus Damm 提交于
Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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