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  1. 30 6月, 2017 2 次提交
  3. 23 6月, 2017 2 次提交
    • A
      clk: keystone: TI_SCI_PROTOCOL is needed for clk driver · 682430e8
      由 Arnd Bergmann 提交于 
      CONFIG_COMPILE_TEST allows building a configuration without
TI_SCI_PROTOCOL, which then fails to link:

drivers/clk/keystone/sci-clk.o: In function `ti_sci_clk_probe':
sci-clk.c:(.text.ti_sci_clk_probe+0x4c): undefined reference to `devm_ti_sci_get_handle'

This makes it a hard dependency. Right now, that means we can't
actually compile-test the driver unless ARCH_KEYSTONE is set as
well, but we can fix that by allowing TI_MESSAGE_MANAGER to
be selected for COMPILE_TEST as well.

Fixes: b745c079 ("clk: keystone: Add sci-clk driver support")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      682430e8
    • K
      clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLL · 5bb4053b
      由 Krzysztof Kozlowski 提交于 
      Similarly to commit f1e9203e ("clk: samsung: Fix Exynos 5420 pinctrl
setup and clock disable failure due to domain being gated") for
Exynos5420, the Exynos4412 also requires that EPLL is not disabled.
Otherwise any access to MAUDIO block will silently halt.

This was not visible before because EPLL on Exynos4 could not be
disabled before commit 6edfa11c ("clk: samsung:
Add enable/disable operation for PLL36XX clocks").  After this commit,
on Odroid U3 board one can see silent hang, usually with last (but
unrelated) messages:

	[    2.382741] input: gpio_keys as /devices/platform/gpio_keys/input/input0
	[    2.405686] usb 1-3: new high-speed USB device number 3 using exynos-ehci
	[    2.419843] max77686-rtc max77686-rtc: setting system clock to 2017-06-21 17:04:13 UTC (1498064653)

Mark Exynos4 variant as also needed EPLL to be enabled all the time.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      5bb4053b
  5. 22 6月, 2017 4 次提交
  7. 20 6月, 2017 21 次提交
  9. 19 6月, 2017 3 次提交
    • K
      clk: mvebu: cp110: add sdio clock to cp-110 system controller · a45af6d3
      由 Konstantin Porotchkin 提交于 
      This commit updates the CP110 system controller driver to add the
definition for a missing clock.

The SDIO clock is dedicated driving the SDHCI interface and its frequency
is 400MHz (2/5 of PLL source clock).

The SDIO interface should be bound to this clock and not the core clock
as in the older code.
Using the wrong clock lead to a maximum SDHCI frequency of 250 Mhz, while
the HW really supports up to 400 Mhz.

This patch also fixes the NAND clock relationship documentation.
Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com>
[gregory.clement@free-electrons.com:
- use sdio instead of emmc to name the clock]
Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      a45af6d3
    • G
      clk: mvebu: cp110: introduce a new binding · 5ffeb5f5
      由 Gregory CLEMENT 提交于 
      The initial intent when the binding of the cp110 system controller was to
have one flat node. The idea being that what is currently a clock-only
driver in drivers would become a MFD driver, exposing the clock, GPIO and
pinctrl functionality. However, after taking a step back, this would lead
to a messy binding. Indeed, a single node would be a GPIO controller,
clock controller, pinmux controller, and more.

This patch adopts a more classical solution of a top-level syscon node
with sub-nodes for the individual devices. The main benefit will be to
have each functional block associated to its own sub-node where we can
put its own properties.

The introduction of the Armada 7K/8K is still in the early stage so the
plan is to remove the old binding. However, we don't want to break the
device tree compatibility for the few devices already in the field. For
this we still keep the support of the legacy compatible string with a big
warning in the kernel about updating the device tree.
Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      5ffeb5f5
    • G
      clk: mvebu: cp110: do not depend anymore of the *-clock-output-names · f5667274
      由 Gregory CLEMENT 提交于 
      Using the *-clock-output-names property was a convenient way to have a
unique name for each clock even when there are multiple cp110 blocks
as we can find on Armada 8K.

However it has some drawbacks: the main one being a stronger link than
necessary between the driver and the device tree. For example the clock
name can't be changed, removed or moved. It is still the early stage of
introduction of the Armada 7K/8K and the hardware is still not totally
documented, especially for the clock part. By removing the use of
*-clock-output-names it will be easier to add new clocks without breaking
the compatibility.

The name of each clock is now created by using its physical address as a
prefix (as it was done for the platform device names). Thanks to this we
have an automatic way to compute a unique name.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      f5667274
  11. 17 6月, 2017 6 次提交
  13. 15 6月, 2017 2 次提交