1. 25 9月, 2014 5 次提交
  2. 09 9月, 2014 8 次提交
  3. 01 9月, 2014 2 次提交
  4. 12 8月, 2014 4 次提交
  5. 09 8月, 2014 1 次提交
    • A
      arm64,ia64,ppc,s390,sh,tile,um,x86,mm: remove default gate area · a6c19dfe
      Andy Lutomirski 提交于
      The core mm code will provide a default gate area based on
      FIXADDR_USER_START and FIXADDR_USER_END if
      !defined(__HAVE_ARCH_GATE_AREA) && defined(AT_SYSINFO_EHDR).
      
      This default is only useful for ia64.  arm64, ppc, s390, sh, tile, 64-bit
      UML, and x86_32 have their own code just to disable it.  arm, 32-bit UML,
      and x86_64 have gate areas, but they have their own implementations.
      
      This gets rid of the default and moves the code into ia64.
      
      This should save some code on architectures without a gate area: it's now
      possible to inline the gate_area functions in the default case.
      Signed-off-by: NAndy Lutomirski <luto@amacapital.net>
      Acked-by: NNathan Lynch <nathan_lynch@mentor.com>
      Acked-by: NH. Peter Anvin <hpa@linux.intel.com>
      Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [in principle]
      Acked-by: Richard Weinberger <richard@nod.at> [for um]
      Acked-by: Will Deacon <will.deacon@arm.com> [for arm64]
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Nathan Lynch <Nathan_Lynch@mentor.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      a6c19dfe
  6. 06 8月, 2014 1 次提交
  7. 28 7月, 2014 1 次提交
    • H
      s390/irq: improve displayed interrupt order in /proc/interrupts · e2213e04
      Hendrik Brueckner 提交于
      Rework the irqclass_main_desc and irqclass_sub_desc data structures which
      are used to report detaild IRQ statistics in /proc/interrupts.  When
      called from the procfs ops, the entries in the structures are processed
      one by one.
      
      The index of an IRQ in the structures is identical to its definition in
      the "enum interruption_class".   To control and (re)order the displayed
      sequence, introduce an irq member in each entry.  This helps to display
      related IRQs together without changing the assigned number in the
      interruption_class enumeration.  That means, adding and displaying new
      IRQs are independent.
      Finally, this new behavior improves to maintain a kernel ABI.
      Signed-off-by: NHendrik Brueckner <brueckner@linux.vnet.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      e2213e04
  8. 24 7月, 2014 2 次提交
  9. 22 7月, 2014 1 次提交
  10. 19 7月, 2014 1 次提交
  11. 16 7月, 2014 2 次提交
  12. 20 6月, 2014 1 次提交
  13. 16 6月, 2014 1 次提交
    • M
      s390/compat: correct ucontext layout for high gprs · b9c9a33b
      Martin Schwidefsky 提交于
      The uc_sigmask definition in the kernel differs from the one in the
      glibc, the kernel uc_sigmask has 64 bits while the glibc verison
      is 1024 bits. The extension of the ucontext structure for 64-bit
      register support for 31-bit compat processes added a new field
      uc_gprs_high which starts 8 bytes after the uc_sigmask field.
      As the glibc view of the ucontext assumes a size of 128 bytes for
      uc_sigmask add a 120 byte padding to the kernel structure
      ucontext_extended after the 8 byte uc_sigmask.
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      b9c9a33b
  14. 28 5月, 2014 2 次提交
  15. 27 5月, 2014 2 次提交
  16. 20 5月, 2014 6 次提交