- 08 1月, 2016 2 次提交
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由 Andrew Lunn 提交于
Rather than have each driver set the driver owner field, do it once in the core code. This will also help with later changes, when the device structure will move. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Not all devices attached to an MDIO bus are phys. So add an mdio_device structure to represent the generic parts of an mdio device, and place this structure into the phy_device. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 12月, 2015 1 次提交
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由 Andrew Lunn 提交于
The PHY counters receiver errors and errors while idle. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 11月, 2015 1 次提交
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由 Andrew Lunn 提交于
The 88E1540 can be found embedded in the Marvell 88E6352 switch. It is compatible with the 88E1510, so add support for it, using the 88E1510 specific functions. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 9月, 2015 1 次提交
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由 Russell King 提交于
Read the standard link partner advertisment registers and store it in phydev->lp_advertising, so ethtool can report this information to userspace via ethtool. Zero it as per genphy if autonegotiation is disabled. Tested with a Marvell 88E1512 PHY. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 8月, 2015 1 次提交
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由 Madalin Bucur 提交于
For the Marvel 88e1111 PHY only two SGMII modes are available, both allowing only SGMII to copper mode (with or without clock). SGMII to fiber mode is not supported. Make sure the fiber/copper registers selector bits are cleared for selecting copper mode. Signed-off-by: NMadalin Bucur <madalin.bucur@freescale.com> Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 7月, 2015 1 次提交
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由 David Thomson 提交于
Support manually setting the polarity to mdi or mdix Signed-off-by: NDavid Thomson <david.thomson@alliedtelesis.co.nz> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 5月, 2015 1 次提交
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由 Florian Fainelli 提交于
Update all open-coded tests for all 4 PHY_INTERFACE_MODE_RGMII* values to use the newly introduced helper: phy_interface_is_rgmii. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 11月, 2014 1 次提交
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由 Johan Hovold 提交于
Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 10月, 2014 2 次提交
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由 Vince Bridgers 提交于
Marvell phy 88E1145 configuration & initialization was missing a case for initializing SGMII mode. This patch adds that case. Signed-off-by: NVince Bridgers <vbridger@opensource.altera.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Viet Nga Dao 提交于
Additional code to m88e1145_config_init function to allow the driver to support SGMII mode. Signed-off-by: NViet Nga Dao <vndao@altera.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 10月, 2014 1 次提交
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由 Sebastian Hesselbarth 提交于
Marvell 88E3016 is a FastEthernet PHY that also can be found in Marvell Berlin SoCs as integrated PHY. Tested-by: NAntoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 12月, 2013 1 次提交
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由 Sebastian Hesselbarth 提交于
Marvell PHYs support generic PHY suspend/resume, so provide those callbacks to all marvell specific drivers. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 10月, 2013 1 次提交
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由 Avinash Kumar 提交于
removes following warnings- drivers/net/phy/marvell.c:37: WARNING: Use #include <linux/io.h> instead of <asm/io.h> drivers/net/phy/marvell.c:39: WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h> Signed-off-by: NAvinash Kumar <avi.kp.137@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 5月, 2013 3 次提交
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由 Michal Simek 提交于
Add support for this new phy ID. Signed-off-by: NRick Hoover <RHoover@digilentinc.com> Signed-off-by: NSteven Wang <steven.wang@digilentinc.com> Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Simek 提交于
This phy is on Xilinx ZC702 zynq development board. Signed-off-by: NAnirudha Sarangi <anirudh@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Simek 提交于
Use macros from linux/marvell_phy.h instead of duplicate magic phy ID in the driver. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 3月, 2013 1 次提交
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由 Michael Stapelberg 提交于
This has been tested on a qnap TS-119P II. Note that enabling WOL with "ethtool -s eth0 wol g" is not enough; you also need to tell the PIC microcontroller inside the qnap that WOL should be enabled by sending 0xF2 with qcontrol(1) and you have to disable EUP ("Energy-using Products", a European power-saving thing) by sending 0xF4. Signed-off-by: NMichael Stapelberg <michael@stapelberg.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 1月, 2013 1 次提交
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由 Stef van Os 提交于
Remove the code that always enables copper/fiber autoselect, ignoring the DIS_FC strapping pin. The default value for this register is autoselect on anyway, and if you explicitly disable autoselect via strapping you probably really don't want autoselect. Signed-off-by: NStef van Os <stef.van.os@prodrive.nl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 7月, 2012 1 次提交
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由 Christian Hohnstaedt 提交于
If registering of one of them fails, all already registered drivers of this module will be unregistered. Use the new register/unregister functions in all drivers registering more than one driver. amd.c, realtek.c: Simplify: directly return registration result. Tested with broadcom.c All others compile-tested. Signed-off-by: NChristian Hohnstaedt <chohnstaedt@innominate.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 4月, 2012 1 次提交
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由 Srinivas Kandagatla 提交于
Compile tested. remove unnecessary code that matches this coccinelle pattern ret = phy_write(x, y , z) if (ret < 0) return ret; return 0; As phy_write returns error code, we dont need to do not need extra check before returning. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 11月, 2010 3 次提交
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由 David Daney 提交于
Some aspects of PHY initialization are board dependent, things like indicator LED connections and some clocking modes cannot be determined by probing. The dev_flags element of struct phy_device can be used to control these things if an appropriate value can be passed from the Ethernet driver. We run into problems however if the PHY connections are specified by the device tree. There is no way for the Ethernet driver to know what flags it should pass. If we are using the device tree, the struct phy_device will be populated with the device tree node corresponding to the PHY, and we can extract extra configuration information from there. The next question is what should the format of that information be? It is highly device specific, and the device tree representation should not be tied to any arbitrary kernel defined constants. A straight forward representation is just to specify the exact bits that should be set using the "marvell,reg-init" property: phy5: ethernet-phy@5 { reg = <5>; compatible = "marvell,88e1149r"; marvell,reg-init = /* led[0]:1000, led[1]:100, led[2]:10, led[3]:tx */ <3 0x10 0 0x5777>, /* Reg 3,16 <- 0x5777 */ /* mix %:0, led[0123]:drive low off hiZ */ <3 0x11 0 0x00aa>, /* Reg 3,17 <- 0x00aa */ /* default blink periods. */ <3 0x12 0 0x4105>, /* Reg 3,18 <- 0x4105 */ /* led[4]:rx, led[5]:dplx, led[45]:drive low off hiZ */ <3 0x13 0 0x0a60>; /* Reg 3,19 <- 0x0a60 */ }; phy6: ethernet-phy@6 { reg = <6>; compatible = "marvell,88e1118"; marvell,reg-init = /* Fix rx and tx clock transition timing */ <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */ /* Adjust LED drive. */ <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */ /* irq, blink-activity, blink-link */ <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */ }; The Marvell PHYs have a page select register at register 22 (0x16), we can specify any register by its page and register number. These are the first and second word. The third word contains a mask to be ANDed with the existing register value, and the fourth word is ORed with the result to yield the new register value. The new marvell_of_reg_init function leaves the page select register unchanged, so a call to it can be dropped into the .config_init functions without unduly affecting the state of the PHY. If CONFIG_OF_MDIO is not set, there is no of_node, or no "marvell,reg-init" property, the PHY initialization is unchanged. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Cyril Chemparathy <cyril@ti.com> Cc: David Daney <ddaney@caviumnetworks.com> Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David Daney 提交于
The 88E1149R is 10/100/1000 quad-gigabit Ethernet PHY. The .config_aneg function can be shared with 88E1118, but it needs its own .config_init. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: Cyril Chemparathy <cyril@ti.com> Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David Daney 提交于
The definition of the Marvell PHY page register is not specific to 88E1121, so rename the macro to MII_MARVELL_PHY_PAGE, and use it throughout. Suggested-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: Cyril Chemparathy <cyril@ti.com> Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 10月, 2010 1 次提交
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由 Cyril Chemparathy 提交于
The marvell 88ec048's official part number is 88e1318s. This patch renames definitions in the driver to reflect this. In addition, a minor bug fix has been added to write back the MSCR1 register value properly. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 10月, 2010 1 次提交
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由 Arnaud Patard 提交于
Commit c477d044 added support for RGMII rx/tx delays except that it ends up clearing rx/tx delays bit for modes differents that RGMII*ID. Due to this, ethernet is not working anymore on my guruplug server +. This patch is fixing that. Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 10月, 2010 1 次提交
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由 Uwe Kleine-König 提交于
MODULE_DEVICE_TABLE only expands to something if it's compiled for a module. So when building-in support for the phys, the mdio_device_id tables are unused. Marking them with __maybe_unused fixes the following warnings: drivers/net/phy/bcm63xx.c:134: warning: 'bcm63xx_tbl' defined but not used drivers/net/phy/broadcom.c:933: warning: 'broadcom_tbl' defined but not used drivers/net/phy/cicada.c:162: warning: 'cicada_tbl' defined but not used drivers/net/phy/davicom.c:222: warning: 'davicom_tbl' defined but not used drivers/net/phy/et1011c.c:114: warning: 'et1011c_tbl' defined but not used drivers/net/phy/icplus.c:137: warning: 'icplus_tbl' defined but not used drivers/net/phy/lxt.c:226: warning: 'lxt_tbl' defined but not used drivers/net/phy/marvell.c:724: warning: 'marvell_tbl' defined but not used drivers/net/phy/micrel.c:234: warning: 'micrel_tbl' defined but not used drivers/net/phy/national.c:154: warning: 'ns_tbl' defined but not used drivers/net/phy/qsemi.c:141: warning: 'qs6612_tbl' defined but not used drivers/net/phy/realtek.c:82: warning: 'realtek_tbl' defined but not used drivers/net/phy/smsc.c:257: warning: 'smsc_tbl' defined but not used drivers/net/phy/ste10Xp.c:135: warning: 'ste10Xp_tbl' defined but not used drivers/net/phy/vitesse.c:195: warning: 'vitesse_tbl' defined but not used Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 8月, 2010 1 次提交
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由 Cyril Chemparathy 提交于
Marvell 88ec048 is a derivative of its 88e1121r device. From the programmer's perspective, the one major difference is the addition of an additional control bit in Page 2 Register 16 - used to control the padding of odd nibble preambles. This patch adds support for this new device, while inheriting as much code as possible from the existing 88e1121r implementation. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 8月, 2010 1 次提交
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由 Cyril Chemparathy 提交于
This patch adds support for RGMII RX/TX delay configuration on marvell 88e1121 and derivatives. With this patch, PHY_INTERFACE_MODE_RGMII_*ID modes are now supported on these devices. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 7月, 2010 1 次提交
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由 Benjamin Herrenschmidt 提交于
This moves the various known Marvell PHY IDs to include/linux/marvell_phy.h along with dev_flags definitions for use by the driver. I then added a flag that changes the PHY init code to setup the LEDs config to the values needed to operate a dns323 rev C1 NAS. I moved the existing "resistance" flag to the .h as well, though I've been unable to find whoever sets this to convert it to use that constant. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 03 4月, 2010 1 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 21 1月, 2010 1 次提交
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由 Liu Yu-B13201 提交于
Signed-off-by: NLiu Yu <yu.liu@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 9月, 2009 1 次提交
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由 Anton Vorontsov 提交于
According to specs, when auto-negotiation is disabled, Marvell PHYs need a software reset after changing speed/duplex forcing bits. Otherwise, the modified bits have no effect. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 6月, 2009 1 次提交
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由 Haiying Wang 提交于
Disable fiber/copper auto selection for Marvell m88e1111 SGMII support. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 4月, 2009 2 次提交
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由 Anatolij Gustschin 提交于
Add did_interrupt() function to check if a PHY port really caused an interrupt. This is needed in the case of shared PHY interrupt pin configuration to stop interrupt event processing for PHY ports which didn't cause an interrupt. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sergei Poselenov 提交于
Add support for the Marvell M88E1121R Dual GigE PHY Signed-off-by: NYuri Tikhonov <yur@emcraft.com> Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 11月, 2008 1 次提交
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由 Ron Madrid 提交于
This patch will add support for the Marvell 88E1118 PHY which supports gigabit ethernet among other things. Signed-off-by: NRon Madrid <ron_madrid@sbcglobal.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 7月, 2008 2 次提交
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由 Wang Jian 提交于
MII_M1111_HWCFG_FIBER_COPPER_RES is a bit of MII_M1111_PHY_EXT_SR, not MII_M1111_PHY_EXT_CR. Signed-off-by: NWang Jian <lark@linux.net.cn> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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由 Wang Jian 提交于
The 27.15 bit (MII_M1111_HWCFG_FIBER_COPPER_AUTO) is disable bit. When set to 1, copper/fiber auto selection is disabled. The current code to enable but actually disable auto selection. Signed-off-by: NWang Jian <lark@linux.net.cn> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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