1. 12 5月, 2015 3 次提交
    • K
      29ad1a7a
    • M
      spi: bcm2835: fix kbuild compile warnings/errors and a typo · 7e52be0d
      Martin Sperl 提交于
      fixes several warnings/error emmitted by the kbuild system:
      * warn: cast from pointer to integer of different size
        using size_t instead of u32
      * error: 'SZ_4K' undeclared
        moved to PAGE_SIZE and PAGE_MASK instead
      
      Review showed also a typo in the same code where tx_buff
      was checked twice instead of checking both rx and tx_buff.
      
      Reported by: Stephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NMartin Sperl <kernel@martin.sperl.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      7e52be0d
    • M
      spi: bcm2835: enable dma modes for transfers meeting certain conditions · 3ecd37ed
      Martin Sperl 提交于
      Conditions per spi_transfer are:
      * transfer.len >= 96 bytes (to avoid mapping overhead costs)
      * transfer.len < 65536 bytes (limitaion by spi-hw block - could get extended)
      * an individual scatter/gather transfer length must be a multiple of 4
        for anything but the last transfer - spi-hw block limit.
        (some shortcut has been taken in can_dma to avoid unnecessary mapping of
         pages which, for which there is a chance that there is a split with a
         transfer length not a multiple of 4)
      
      If it becomes a necessity these restrictions can get removed by additional
      code.
      
      Note that this patch requires a patch to dma-bcm2835.c by Noralf to
      enable scatter-gather mode inside the dmaengine, which has not been
      merged yet.
      
      That is why no patch to arch/arm/boot/dts/bcm2835.dtsi is included - the
      code works as before without dma when tx/rx are not set, but it writes
      a message warning about dma not used:
      spi-bcm2835 20204000.spi: no tx-dma configuration found - not using dma mode
      
      To enable dma-mode add the following lines to the device-tree:
              dmas = <&dma 6>, <&dma 7>;
              dma-names = "tx", "rx";
      
      Tested-by: Noralf Trønnes <noralf@tronnes.org> (private communication)
      Signed-off-by: NMartin Sperl <kernel@martin.sperl.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      3ecd37ed
  2. 04 5月, 2015 1 次提交
    • Y
      spi: bcm2835: depends GPIOLIB · e0d58cdc
      Yoshinori Sato 提交于
      I got following error on CONFIG_GPIOLIB=n.
      
      drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
      drivers/spi/spi-bcm2835.c:356:21: error: dereferencing pointer to incomplete type 'struct gpio_chip'
        return !strcmp(chip->label, data);
                           ^
      drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup':
      drivers/spi/spi-bcm2835.c:382:9: error: implicit declaration of function 'gpiochip_find' [-Werror=implicit-function-declaration]
        chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
               ^
      drivers/spi/spi-bcm2835.c:382:7: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
        chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
             ^
      drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
      drivers/spi/spi-bcm2835.c:357:1: warning: control reaches end of non-void function [-Wreturn-type]
       }
       ^
      Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      e0d58cdc
  3. 27 4月, 2015 2 次提交
  4. 17 4月, 2015 1 次提交
  5. 11 4月, 2015 2 次提交
    • M
      spi: bcm2835: enabling polling mode for transfers shorter than 30us · 704f32d4
      Martin Sperl 提交于
      In cases of short transfer times the CPU is spending lots of time
      in the interrupt handler and scheduler to reschedule the worker thread.
      
      Measurements show that we have times where it takes 29.32us to between
      the last clock change and the time that the worker-thread is running again
      returning from wait_for_completion_timeout().
      
      During this time the interrupt-handler is running calling complete()
      and then also the scheduler is rescheduling the worker thread.
      
      This time can vary depending on how much of the code is still in
      CPU-caches, when there is a burst of spi transfers the subsequent delays
      are in the order of 25us, so the value of 30us seems reasonable.
      
      With polling the whole transfer of 4 bytes at 10MHz finishes after 6.16us
      (CS down to up) with the real transfer (clock running) taking 3.56us.
      So the efficiency has much improved and is also freeing CPU cycles,
      reducing interrupts and context switches.
      
      Because of the above 30us seems to be a reasonable limit for polling.
      Signed-off-by: NMartin Sperl <kernel@martin.sperl.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      704f32d4
    • M
      spi: bcm2835: transform native-cs to gpio-cs on first spi_setup · a30a555d
      Martin Sperl 提交于
      Transforms the bcm-2835 native SPI-chip select to their gpio-cs equivalent.
      
      This allows for some support of some optimizations that are not
      possible due to HW-gliches on the CS line - especially filling
      the FIFO before enabling SPI interrupts (by writing to CS register)
      while the transfer is already in progress (See commit: e3a2be30)
      
      This patch also works arround some issues in bcm2835-pinctrl which does not
      set the value when setting the GPIO as output - it just sets up output and
      (typically) leaves the GPIO as low.  When a fix for this is merged then this
      gpio_set_value can get removed from bcm2835_spi_setup.
      Signed-off-by: NMartin Sperl <kernel@martin.sperl.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      a30a555d
  6. 09 4月, 2015 3 次提交
  7. 08 4月, 2015 2 次提交
  8. 07 4月, 2015 5 次提交
  9. 02 4月, 2015 2 次提交
    • L
      spi: imx: read back the RX/TX watermark levels earlier · f511ab09
      Lucas Stach 提交于
      They are used to decide if the controller can do DMA on a buffer
      of a specific length and thus are needed before any transfer is attempted.
      
      This fixes a memory leak where the SPI core uses the drivers can_dma()
      callback to determine if a buffer needs to be mapped. As the watermark
      levels aren't correct at that point the driver falsely claims to be able to
      DMA the buffer when it fact it isn't.
      After the transfer has been done the core uses the same callback to
      determine if it needs to unmap the buffers. As the driver now correctly
      claims to not being able to DMA the buffer the core doesn't attempt to
      unmap the buffer which leaves the SGT leaking.
      
      Fixes: f62caccd (spi: spi-imx: add DMA support)
      Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Cc: stable@vger.kernel.org
      f511ab09
    • C
      spi: spi-bfin5xx: Initialize cr_width in bfin_spi_pump_transfers() · 057f6061
      Chen Gang 提交于
      cr_width may be not initialized before using by cr, the related warning
      (with defconfig under blackfin by gcc5):
      
          CC      drivers/spi/spi-bfin5xx.o
        drivers/spi/spi-bfin5xx.c: In function 'bfin_spi_pump_transfers':
        drivers/spi/spi-bfin5xx.c:655:5: warning: 'cr_width' may be used uninitialized in this function [-Wmaybe-uninitialized]
          cr |= cr_width;
             ^
      Signed-off-by: NChen Gang <gang.chen.5i5j@gmail.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      057f6061
  10. 01 4月, 2015 1 次提交
  11. 31 3月, 2015 2 次提交
  12. 30 3月, 2015 3 次提交
  13. 28 3月, 2015 1 次提交
    • M
      spi: spidev: Warn loudly if instantiated from DT as "spidev" · 956b200a
      Mark Brown 提交于
      Since spidev is a detail of how Linux controls a device rather than a
      description of the hardware in the system we should never have a node
      described as "spidev" in DT, any SPI device could be a spidev so this
      is just not a useful description.
      
      In order to help prevent users from writing such device trees generate a
      warning if spidev is instantiated as a DT node without an ID in the match
      table.
      Signed-off-by: NMark Brown <broonie@kernel.org>
      956b200a
  14. 27 3月, 2015 3 次提交
    • M
      spi: bcm2835: move to the transfer_one driver model · e34ff011
      Martin Sperl 提交于
      This also allows for GPIO-CS to get used removing the limitation of
      2/3 SPI devises on the SPI bus.
      
      Fixes: spi-cs-high with native CS with multiple devices on the spi-bus
      resetting the chip selects to "normal" polarity after a finished
      transfer.
      
      No other functionality/improvements added.
      
      Tested with the following 4 devices on the spi-bus:
      * mcp2515 with native CS
      * mcp2515 with gpio CS
      * fb_st7735r with native CS
          (plus spi-cs-high via transistor inverting polarity)
      * enc28j60 with gpio-CS
      Tested-by: NMartin Sperl <kernel@martin.sperl.org>
      Signed-off-by: NMartin Sperl <kernel@martin.sperl.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      e34ff011
    • J
      spi/rockchip: Add device tree property to configure Rx Sample Delay · 76b17e6e
      Julius Werner 提交于
      We have found that we can sometimes see read failures on boards with
      high-capacitance SPI lines. It seems that the controller samples the Rx
      data line too early, and its register interface has an "Rx Sample Delay"
      setting to fine-tune against this issue.
      
      This patch adds a new optional device tree entry that can configure this
      delay in terms of nanoseconds. The kernel will calculate the
      best-fitting amount of parent clock ticks to program the controller with
      based on that.
      Signed-off-by: NJulius Werner <jwerner@chromium.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      76b17e6e
    • J
      spi/rockchip: Round up clock rate divisor to err on the safe side · 754ec43c
      Julius Werner 提交于
      The Rockchip SPI driver currently calculates its clock rate divisor by
      integer dividing the parent rate by the target rate, and then rounding
      the result up to the next even number (since the divisor must be
      even).
      
      Clock rate divisors should always be rounded up, so that the resulting
      frequency is lower or equal to the target. This is correctly done in the
      second step here but not in the first, so we still have a risk of
      exceeding the desired target frequency (e.g. setting spi-max-frequency
      to 40000000 with a parent clock of 99000000 could lead to a divisor of
      99000000 / 40000000 == 2 (which is even) that then results in an
      effective frequency of 99000000 / 2 == 49500000 (potentially exceeding
      the flash chip's specifications).
      
      This patch changes the division to round up to fix this problem.
      Signed-off-by: NJulius Werner <jwerner@chromium.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      754ec43c
  15. 26 3月, 2015 2 次提交
  16. 25 3月, 2015 2 次提交
  17. 24 3月, 2015 5 次提交