Device tree binding information for DA9062 and DA9061 thermal junction
temperature monitor.

Binding descriptions for the DA9061 and DA9062 thermal TJUNC supervisor
device driver, using a single THERMAL_TRIP_HOT trip-wire and allowing for
a configurable polling period for over-temperature polling.

This patch also adds two examples, one for DA9062 and one for DA9061. The
DA9061 example uses a fall-back compatible string for the DA9062.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

This commit documents binding for thermal used in Northstar family SoCs.

There isn't any known Northstar device with active cooling system so DT
example has empty cooling-maps node. There is also no support for CPU
frequency throttling so I put only a critical trip in the example.
Signed-off-by: NRafał Miłecki <rafal@milecki.pl>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Add a thermal zone in order to make the example complete.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

The triplet present in "opp-microvolt" property should be in the order
<target min max>, while all the examples have it in the order
<min target max>.

Fix it.

Luckily all of the users of "opp-microvolt" property have applied brain
instead of copying the examples from documentation and none of the
actual dts files have it wrong.
Reported-by: NRob Herring <robh@kernel.org>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Fix typos and add the following to the scripts/spelling.txt:

  followings||following

While we are here, add a missing colon in the boilerplate in DT binding
documents.  The "you SoC" in allwinner,sunxi-pinctrl.txt was fixed as
well.

I reworded "as the followings:" to "as follows:" for
drivers/usb/gadget/udc/renesas_usb3.c.

Link: http://lkml.kernel.org/r/1481573103-11329-32-git-send-email-yamada.masahiro@socionext.comSigned-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fix typos and add the following to the scripts/spelling.txt:

  an user||a user
  an userspace||a userspace

I also added "userspace" to the list since it is a common word in Linux.
I found some instances for "an userfaultfd", but I did not add it to the
list.  I felt it is endless to find words that start with "user" such as
"userland" etc., so must draw a line somewhere.

Link: http://lkml.kernel.org/r/1481573103-11329-4-git-send-email-yamada.masahiro@socionext.comSigned-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fix typos and add the following to the scripts/spelling.txt:

  swith||switch
  swithable||switchable
  swithed||switched
  swithing||switching

While we are here, fix the "update" to "updates" in the touched hunk in
drivers/net/wireless/marvell/mwifiex/wmm.c.

Link: http://lkml.kernel.org/r/1481573103-11329-2-git-send-email-yamada.masahiro@socionext.comSigned-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

These are the current source files that should not have
executable attributes set.

[ Normally this would be sent through Andrew Morton's tree
  but his quilt tools don't like permission only patches. ]
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt.  However the interrupt itself was not cleared thus on
first hit, the system enters infinite interrupt handling loop.

On Odroid U3 (Exynos4412), when booted with s3c2410_wdt.soft_noboot=1
argument the console is flooded:
	# killall -9 watchdog
	[   60.523760] s3c2410-wdt 10060000.watchdog: watchdog timer expired (irq)
	[   60.536744] s3c2410-wdt 10060000.watchdog: watchdog timer expired (irq)

Fix this by writing something to the WTCLRINT register to clear the
interrupt.  The register WTCLRINT however appeared in S3C6410 so a new
watchdog quirk and flavor are needed.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

This patch adds dt-binding documentation for zx2967 family
watchdog controller.
Signed-off-by: NBaoyou Xie <baoyou.xie@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

This adds DT bindings for the Cortina systems Gemini SoC
watchdog timer.

Cc: devicetree@vger.kernel.org
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

For different types of SoC the sensor id and endianness may vary.
"#thermal-sensor-cells" is used to provide sensor id information.
"little-endian" property is to tell the endianness of TMU.
Signed-off-by: NJia Hongtao <hongtao.jia@nxp.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

The Armada 7K/8K use the same RTC IP than the Armada 38x. However the SOC
integration differs in 2 points:
 - MBUS bridge timing initialization
 - IRQ configuration at SoC level

Moreover the Armada 7K/8K have an issue preventing to get the interrupt
from alarm 1. This commit allows to use alarm 2 for these A7K/8K but to
still use alarm 1 for the Armada 38x.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>

According to using PHY framework, updates the exynos5440-pcie binding.  For
maintaining backward compatibility, leaves the current dt-binding.  (It
should be deprecated.)

Recommends to use the PHY Framework and "config" property to follow the
designware-pcie binding.  If you use the old way, can see "missing *config*
reg space" message.  Because the getting configuration space address from
range is old way.

NOTE: When use the "config" property, first name of 'reg-names' must be set
to "elbi".  Otherwise driver can't maintain the backward capability.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com>
Acked-by: NRob Herring <robh@kernel.org>

Add the exynos-pcie-phy binding for Exynos PCIe PHY.  This is for using
generic PHY framework.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NRob Herring <robh@kernel.org>

In Tegra186, the BPMP (Boot and Power Management Processor) owns certain
HW devices, such as the I2C controller for the power management I2C bus.
Software running on other CPUs must perform IPC to the BPMP in order to
execute transactions on that I2C bus. This binding describes an I2C bus
that is accessed in such a fashion.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add constants and callback functions for the dwmac on rk3328 socs.
As can be seen, the base structure is the same, only registers and the
bits in them moved slightly.
Signed-off-by: Ndavid.wu <david.wu@rock-chips.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add device-tree binding documentation for the MI0283QT display panel.
Signed-off-by: NNoralf Trønnes <noralf@tronnes.org>
Acked-by: NRob Herring <robh@kernel.org>

Display panels can be oriented many ways, especially in the embedded
world. The rotation property is a way to describe this orientation.
The counter clockwise direction is chosen because that's what fbdev
and drm use.
Signed-off-by: NNoralf Trønnes <noralf@tronnes.org>
Acked-by: NThierry Reding <treding@nvidia.com>
Acked-by: NRob Herring <robh@kernel.org>

Multi-Inno Technology Co.,Ltd is a Hong Kong based company offering
LCD, LCD module products and complete panel solutions.
Signed-off-by: NNoralf Trønnes <noralf@tronnes.org>
Acked-by: NRob Herring <robh@kernel.org>

This add power-domains for mt2701-afe-pcm
Signed-off-by: NGarlic Tseng <garlic.tseng@mediatek.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The Marvell devices may have many gpio pins, and hence for wakeup
on these out-of-band pins, the chip needs to be told which pin is
to be used for wakeup, using an hci command.

Thus, we read the pin number etc from the device tree node and send
a command to the chip.
Signed-off-by: NRajat Jain <rajatja@google.com>
Reviewed-by: NBrian Norris <briannorris@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>

Some onboard BT chips (e.g. Marvell 8997) contain a wakeup pin that
can be connected to a gpio on the CPU side, and can be used to wakeup
the host out-of-band. This can be useful in situations where the
in-band wakeup is not possible or not preferable (e.g. the in-band
wakeup may require the USB host controller to remain active, and
hence consuming more system power during system sleep).

The oob gpio interrupt to be used for wakeup on the CPU side, is
read from the device tree node, (using standard interrupt descriptors).
A devcie tree binding document is also added for the driver. The
compatible string is in compliance with
Documentation/devicetree/bindings/usb/usb-device.txt
Signed-off-by: NRajat Jain <rajatja@google.com>
Reviewed-by: NBrian Norris <briannorris@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMarcel Holtmann <marcel@holtmann.org>

Allow the driver to work with device tree support.

Based on initial patch submission from Peter Fox.

Tested on a imx7d-sdb board connected to a SHT15 board via Mikro Bus.
Signed-off-by: NMarco Franchi <marco.franchi@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

add Faraday Technology Corporation as vendor faraday for DT
Signed-off-by: NHans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: NRob Herring <robh@kernel.org>

This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.

Furthermore add myself as a maintainer for this driver.

The datasheet can be found at the manufacturers website, see [1]. All
device-tree exposed configuration features have been tested on a i.MX6
platform with a USB2512B hub.

[1] http://ww1.microchip.com/downloads/en/DeviceDoc/00001692C.pdfSigned-off-by: NRichard Leitner <richard.leitner@skidata.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This driver supports the Lantiq SSC SPI controller in master
mode. This controller is found on Intel (former Lantiq) SoCs like
the Danube, Falcon, xRX200, xRX300.

The hardware uses two hardware FIFOs one for received and one for
transferred bytes. When the driver writes data into the transmit FIFO
the complete word is taken from the FIFO into a shift register. The
data from this shift register is then written to the wire. This driver
uses the interrupts signaling the status of the FIFOs and not the shift
register. It is also possible to use the interrupts for the shift
register, but they will send a signal after every word. When using the
interrupts for the shift register we get a signal when the last word is
written into the shift register and not when it is written to the wire.
After all FIFOs are empty the driver busy waits till the hardware is
not busy any more and returns the transfer status.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add a new compatible for sun4i-i2s driver to handle some
SoCs that have a reset line that must be asserted/deasserted.

This new compatible, "allwinner,sun6i-a31-i2s", requires the
property "resets" which should be a phandle to the reset line.
Except these differences, the compatible is identical to previous one
which will not handle a reset line.
Signed-off-by: NMylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

We introduced recently a new compatible to deal with the A64 eMMC
controller, let's document its binding.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Cc: <devicetree@vger.kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com>
Tested-by: NJan Glauber <jglauber@cavium.com>
Tested-by: NStefan Wahren <stefan.wahren@i2se.com>
Acked-by: NRob Herring <robh@kernel.org>

In the case of a single clock source, you don't need names. However,
if the controller has 2 clock sources, you need to name them correctly
so the driver can find the 2nd one. The 2nd clock is for the internal
card detect logic.
Signed-off-by: NChris Brandt <chris.brandt@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NRob Herring <robh@kernel.org>

Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: NMatt Ranostay <matt@ranostay.consulting>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>

This patch fix some spelling typo found in devicetree/bindings/mmc.
Signed-off-by: NMasanari Iida <standby24x7@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Document the device-tree binding of ZTE MMC host on
ZX296718 SoC.
Signed-off-by: NJun Nie <jun.nie@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add fifo-addr property and fifo-watermark-quirk property to
synopsys-dw-mshc bindings. It is intended to provide more
dt interface to support SoCs specific configuration.
Signed-off-by: NJun Nie <jun.nie@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Many Motorola phones like droid 4 are using a custom PMIC called CPCAP
or 6556002. We can support it's core features quite easily with regmap_spi
and regmap_irq.

The children of cpcap, such as regulators, ADC and USB, can be just regular
device drivers and defined in the dts file. They get probed as we call
of_platform_populate() at the end of our probe, and then the children
can just call dev_get_regmap(dev.parent, NULL) to get the regmap.

Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Scott <michael.scott@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch adds documentation for devicetree bindings
for LED support as the subnode of MT6323 PMIC
Signed-off-by: NSean Wang <sean.wang@mediatek.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The Aspeed SoC Display Controller is presented as a syscon device to
arbitrate access by display and pinmux drivers. Video pinmux
configuration on fifth generation SoCs depends on bits in both the
System Control Unit and the Display Controller.
Signed-off-by: NAndrew Jeffery <andrew@aj.id.au>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends
on bits in both the System Control Unit and the LPC Host Controller.

The Aspeed LPC Host Controller is described as a child node of the
LPC host-range syscon device for arbitration of access by the host
controller and pinmux drivers.
Signed-off-by: NAndrew Jeffery <andrew@aj.id.au>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Signed-off-by: NAndrew Jeffery <andrew@aj.id.au>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>