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  1. 16 10月, 2014 1 次提交
    • N
      net: fec: ptp: fix convergence issue to support LinuxPTP stack · 28b5f058
      由 Nimrod Andy 提交于 
      iMX6SX IEEE 1588 module has one hw issue in capturing the ATVR register.
The current SW flow is:
		ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK;
		ts_counter_ns = ENET0->ATVR;
The ATVR value is not expected value that cause LinuxPTP stack cannot be convergent.

ENET Block Guide/ Chapter for the iMX6SX (PELE) address the issue:
After set ENET_ATCR[Capture], there need some time cycles before the counter
value is capture in the register clock domain. The wait-time-cycles is at least
6 clock cycles of the slower clock between the register clock and the 1588 clock.
So need something like:
		ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK;
		wait();
		ts_counter_ns = ENET0->ATVR;

For iMX6SX, the 1588 ts_clk is fixed to 25Mhz, register clock is 66Mhz, so the
wait-time-cycles must be greater than 240ns (40ns * 6). The patch add 1us delay
before cpu read ATVR register.

Changes V2:
Modify the commit/comments log to describe the issue clearly.
Signed-off-by: NFugang Duan <B38611@freescale.com>
Acked-by: NRichard Cochran <richardcochran@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      28b5f058
  3. 15 10月, 2014 2 次提交
  5. 06 10月, 2014 2 次提交
  7. 02 10月, 2014 1 次提交
  9. 27 9月, 2014 5 次提交
  11. 23 9月, 2014 1 次提交
  13. 20 9月, 2014 3 次提交
  15. 16 9月, 2014 2 次提交
  17. 14 9月, 2014 10 次提交
  19. 23 8月, 2014 1 次提交
    • N
      net: fec: ptp: avoid register access when ipg clock is disabled · 91c0d987
      由 Nimrod Andy 提交于 
      The current kernel hang on i.MX6SX with rootfs mount from MMC.
The root cause is that ptp uses a periodic timer to access enet register
even if ipg clock is disabled.

FEC ptp driver start one period timer to read 1588 counter register in the
ptp init function that is called after FEC driver is probed.

To save power, after FEC probe finish, FEC driver disable all clocks including
ipg clock that is needed for register access.

i.MX5x, i.MX6q/dl/sl FEC register access don't cause system hang when ipg clock
is disabled, just return zero value. But for i.MX6sx SOC, it cause system hang.

To avoid the issue, we need to check ptp clock status before ptp timer count access.
Signed-off-by: NFugang Duan <B38611@freescale.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      91c0d987
  21. 12 8月, 2014 1 次提交
  23. 25 7月, 2014 1 次提交
  25. 09 7月, 2014 10 次提交