1. 23 6月, 2006 6 次提交
    • A
      [PATCH] Don't trigger full rebuild via CONFIG_MTRR · 27b07da7
      Alexey Dobriyan 提交于
      Only drm, framebuffer, mtrr parts + misc files here and there.
      Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      27b07da7
    • A
      [PATCH] i386 apm.c optimization · 87af2ffd
      Andreas Mohr 提交于
      - avoid expensive modulo (integer division) which happened
        since APM_MAX_EVENTS is 20 (non-power-of-2)
      - kill compiler warnings by initializing two variables
      - add __read_mostly to some important static variables that are read often
        (by idle loop etc.)
      - constify several structures
      Signed-off-by: NAndreas Mohr <andi@lisas.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      87af2ffd
    • A
      a0b4da91
    • H
      [PATCH] x86: cache pollution aware __copy_from_user_ll() · c22ce143
      Hiro Yoshioka 提交于
      Use the x86 cache-bypassing copy instructions for copy_from_user().
      
      Some performance data are
      
      Total of GLOBAL_POWER_EVENTS (CPU cycle samples)
      
      2.6.12.4.orig    1921587
      2.6.12.4.nt      1599424
      1599424/1921587=83.23% (16.77% reduction)
      
      BSQ_CACHE_REFERENCE (L3 cache miss)
      2.6.12.4.orig      57427
      2.6.12.4.nt        20858
      20858/57427=36.32% (63.7% reduction)
      
      L3 cache miss reduction of __copy_from_user_ll
      samples  %
      37408    65.1412  vmlinux                  __copy_from_user_ll
      23        0.1103  vmlinux                  __copy_user_zeroing_intel_nocache
      23/37408=0.061% (99.94% reduction)
      
      Top 5 of 2.6.12.4.nt
      Counted GLOBAL_POWER_EVENTS events (time during which processor is not stopped) with a unit mask of 0x01 (mandatory) count 100000
      samples  %        app name                 symbol name
      128392    8.0274  vmlinux                  __copy_user_zeroing_intel_nocache
      64206     4.0143  vmlinux                  journal_add_journal_head
      59746     3.7355  vmlinux                  do_get_write_access
      47674     2.9807  vmlinux                  journal_put_journal_head
      46021     2.8774  vmlinux                  journal_dirty_metadata
      pattern9-0-cpu4-0-09011728/summary.out
      
      Counted BSQ_CACHE_REFERENCE events (cache references seen by the bus unit) with a unit mask of 0x3f (multiple flags) count 3000
      samples  %        app name                 symbol name
      69755     4.2861  vmlinux                  __copy_user_zeroing_intel_nocache
      55685     3.4215  vmlinux                  journal_add_journal_head
      52371     3.2179  vmlinux                  __find_get_block
      45504     2.7960  vmlinux                  journal_put_journal_head
      36005     2.2123  vmlinux                  journal_stop
      pattern9-0-cpu4-0-09011744/summary.out
      
      Counted BSQ_CACHE_REFERENCE events (cache references seen by the bus unit) with a unit mask of 0x200 (read 3rd level cache miss) count 3000
      samples  %        app name                 symbol name
      1147      5.4994  vmlinux                  journal_add_journal_head
      881       4.2240  vmlinux                  journal_dirty_data
      872       4.1809  vmlinux                  blk_rq_map_sg
      734       3.5192  vmlinux                  journal_commit_transaction
      617       2.9582  vmlinux                  radix_tree_delete
      pattern9-0-cpu4-0-09011731/summary.out
      
      iozone results are
      
      original 2.6.12.4 CPU time = 207.768 sec
      cache aware       CPU time = 184.783 sec
      (three times run)
      184.783/207.768=88.94% (11.06% reduction)
      
      original:
      pattern9-0-cpu4-0-08191720/iozone.out:  CPU Utilization: Wall time   45.997    CPU time   64.527    CPU utilization 140.28 %
      pattern9-0-cpu4-0-08191741/iozone.out:  CPU Utilization: Wall time   46.878    CPU time   71.933    CPU utilization 153.45 %
      pattern9-0-cpu4-0-08191743/iozone.out:  CPU Utilization: Wall time   45.152    CPU time   71.308    CPU utilization 157.93 %
      
      cache awre:
      pattern9-0-cpu4-0-09011728/iozone.out:  CPU Utilization: Wall time   44.842    CPU time   62.465    CPU utilization 139.30 %
      pattern9-0-cpu4-0-09011731/iozone.out:  CPU Utilization: Wall time   44.718    CPU time   59.273    CPU utilization 132.55 %
      pattern9-0-cpu4-0-09011744/iozone.out:  CPU Utilization: Wall time   44.367    CPU time   63.045    CPU utilization 142.10 %
      Signed-off-by: NHiro Yoshioka <hyoshiok@miraclelinux.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      c22ce143
    • C
      [PATCH] sys_move_pages: 32bit support (i386, x86_64) · 1b2db9fb
      Christoph Lameter 提交于
      sys_move_pages() support for 32bit (i386 plus x86_64 compat layer)
      
      Add support for move_pages() on i386 and also add the compat functions
      necessary to run 32 bit binaries on x86_64.
      
      Add compat_sys_move_pages to the x86_64 32bit binary layer.  Note that it is
      not up to date so I added the missing pieces.  Not sure if this is done the
      right way.
      
      [akpm@osdl.org: compile fix]
      Signed-off-by: NChristoph Lameter <clameter@sgi.com>
      Cc: Andi Kleen <ak@muc.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      1b2db9fb
    • Y
      [PATCH] Unify pxm_to_node() and node_to_pxm() · 762834e8
      Yasunori Goto 提交于
      Consolidate the various arch-specific implementations of pxm_to_node() and
      node_to_pxm() into a single generic version.
      Signed-off-by: NYasunori Goto <y-goto@jp.fujitsu.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Dave Hansen <haveblue@us.ibm.com>
      Cc: "Brown, Len" <len.brown@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      762834e8
  2. 22 6月, 2006 5 次提交
  3. 20 6月, 2006 2 次提交
  4. 09 6月, 2006 1 次提交
    • A
      [PATCH] Fix HPET operation on 32-bit NVIDIA platforms · d44647b0
      Andy Currid 提交于
      From: "Andy Currid" <ACurrid@nvidia.com>
      
      This patch fixes a kernel panic during boot that occurs on NVIDIA platforms
      that have HPET enabled.
      
      When HPET is enabled, the standard timer IRQ is routed to IOAPIC pin 2 and is
      advertised as such in the ACPI APIC table - but an earlier workaround in the
      kernel was ignoring this override.  The fix is to honor timer IRQ overrides
      from ACPI when HPET is detected on an NVIDIA platform.
      Signed-off-by: NAndy Currid <acurrid@nvidia.com>
      Cc: "Brown, Len" <len.brown@intel.com>
      Cc: "Yu, Luming" <luming.yu@intel.com>
      Cc: Andi Kleen <ak@muc.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      d44647b0
  5. 06 6月, 2006 2 次提交
  6. 05 6月, 2006 3 次提交
  7. 01 6月, 2006 2 次提交
  8. 31 5月, 2006 9 次提交
  9. 27 5月, 2006 1 次提交
  10. 24 5月, 2006 1 次提交
  11. 22 5月, 2006 3 次提交
  12. 16 5月, 2006 3 次提交
  13. 13 5月, 2006 1 次提交
    • L
      Revert "[PATCH] i386: export: memory more than 4G through /proc/iomem" · 9be2f7c3
      Linus Torvalds 提交于
      This reverts commit 10dbe196.
      
      The resource struct is still 32-bit, so trying to save a 64-bit memory
      size there obviously won't work.
      
      When we merge the 64-bit resource series, we can re-enable this.
      
      Thanks to Sachin Sant and Maneesh Soni for debugging
      
      Cc: Maneesh Soni <maneesh@in.ibm.com>
      Cc: Sachin Sant <sachinp@in.ibm.com>
      Cc: Russell King <rmk+lkml@arm.linux.org.uk>
      Cc: Sharyathi Nagesh <sharyath@in.ibm.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Vivek Goyal <vgoyal@in.ibm.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      9be2f7c3
  14. 09 5月, 2006 1 次提交
    • K
      [PATCH] x86_64: avoid IRQ0 ioapic pin collision · e0c1e9bf
      Kimball Murray 提交于
      The patch addresses a problem with ACPI SCI interrupt entry, which gets
      re-used, and the IRQ is assigned to another unrelated device.  The patch
      corrects the code such that SCI IRQ is skipped and duplicate entry is
      avoided.  Second issue came up with VIA chipset, the problem was caused by
      original patch assigning IRQs starting 16 and up.  The VIA chipset uses
      4-bit IRQ register for internal interrupt routing, and therefore cannot
      handle IRQ numbers assigned to its devices.  The patch corrects this
      problem by allowing PCI IRQs below 16.
      
      Cc: len.brown@intel.com
      
      Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      e0c1e9bf