- 19 9月, 2014 4 次提交
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由 Tony Lindgren 提交于
As we have support for this in board-rx51-peripherals.c, let's add it to the .dts files too. Note that the reset GPIO will eventually go to the driver. For now let's just pull it down and skip any further reset in case the bootloader has configured the MAC address so NFSroot works. Also note that after 3430-sdp are using proper GPMC timings we can remove the tests for smsc,lan91c94 in gpmc.c. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
There are external pulls on these lines and enabling the internal pulls can cause issue. This is because the internal pulls are parallel with the external pulls. So let's clear the internal I2C pulls. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
This is no longer needed as the device specific wake-up event can now be specified with interrupts-extended property where the second interrupt is the pinctrl-single register, such as the UART3 RX pin. Note that twl4030_omap3.dtsi needs to set WAKEUPENABLE for off-idle to properly trigger the PMIC scripts. And GPIO pins still need to set WAKEUPENABLE for wake-up events. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Compared to legacy booting, we don't have wake-up events enabled for device tree based booting. This means that if deeper idle states are enabled, the device won't wake up to UART events and seems like it has hung. Let's fix that by adding the wake-up interrupt. Note that we don't need to set the PIN_OFF_WAKEUPENABLE any longer, that's handled by the wake-up interrupt when the serial driver does request_irq on it. Tested with the following on omap3-overo-summit that has the ES2.1 omap: #!/bin/bash uarts=$(find /sys/class/tty/ttyO*/device/power/ -type d) for uart in $uarts; do echo 3000 > $uart/autosuspend_delay_ms done uarts=$(find /sys/class/tty/ttyO*/power/ -type d) for uart in $uarts; do echo enabled > $uart/wakeup echo auto > $uart/control done echo 1 > /sys/kernel/debug/pm_debug/enable_off_mode # grep -i uart /proc/interrupts 90: 1085 INTC 74 OMAP UART2 338: 5 pinctrl 366 OMAP UART2 # grep ^core_pwrdm /sys/kernel/debug/pm_debug/count core_pwrdm (ON),OFF:1654,RET:131,INA:39,ON:1825... Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 9月, 2014 1 次提交
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由 Suman Anna 提交于
The sub-mailbox devices are added to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5 family of SoCs. This data represents the same mailboxes that used to be represented in hwmod attribute data previously. The node name is chosen based on the .name field of omap_mbox_dev_info structure used in the hwmod data. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 9月, 2014 15 次提交
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由 Nishanth Menon 提交于
Mark rxd as wakeupcapable for 115200n8 no hardware-flow control configuration. If h/w flow control is being used, then rts/cts appropriately should be used. Signed-off-by: NNishanth Menon <nm@ti.com>
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由 Nishanth Menon 提交于
We've had deeper idle states working on omaps for few years now, but only in the legacy mode. When booted with device tree, the wake-up events did not have a chance to work until commit 3e6cee17 ("pinctrl: single: Add support for wake-up interrupts") that recently got merged. In addition to that we also needed commit 79d97015 ("of/irq: create interrupts-extended property") that's now also merged. Note that there's no longer need to specify the wake-up bit in the pinctrl settings, the request_irq on the wake-up pin takes care of that. Signed-off-by: NNishanth Menon <nm@ti.com>
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由 Nishanth Menon 提交于
Now that ti,am437-padconf is available, switch over to that compatible property. Retain pinctrl-single for legacy support. While at it, mark the pinctrl as interrupt controller so that it can be used with interrupts-extended property for wakeup events. Signed-off-by: NNishanth Menon <nm@ti.com>
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由 Nishanth Menon 提交于
Now that ti,dra7-padconf is available, switch over to that compatible property. Retain pinctrl-single for legacy support. While at it, mark pinctrl as interrupt controller so that it can be used with interrupts-extended property for wakeup events. Signed-off-by: NNishanth Menon <nm@ti.com>
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由 Nishanth Menon 提交于
Now that ti,omap5-padconf is available, switch over to that compatible property. Retain pinctrl-single for legacy support. While at it, mark pinctrl as interrupt controller so that it can be used with interrupts-extended property for wakeup events. Signed-off-by: NNishanth Menon <nm@ti.com>
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由 Mark Brown 提交于
Add regulator-name properties for the regulators that don't have them, allowing the kernel to display the name from the schematic rather than the name of the regulator on the PMIC in order to improve diagnostics. Signed-off-by: NMark Brown <broonie@kernel.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dmitry Lifshitz 提交于
CM-T54 CoM can be used with various custom baseboards, other than SB-T54 (supplied with SBC-T54 single board computer). Update model property of SBC-T54 DT to clarify this. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
The RFBI node for OMAP DSS was left out when adding the rest of the DSS nodes, because it was not clear how to set up the clocks for the RFBI. However, it seems that if there is a HWMOD for a device, we also need a DT node for it. Otherwise, at boot, we get: WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2542 _init+0x464/0x4e0() omap_hwmod: dss_rfbi: doesn't have mpu register target base Now that v3.17-rc3 contains a fix 8fd46439 ("ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates") for the L3 ICLK required by the RFBI, let's add the RFBI node to get rid of the warning. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> [tony@atomide.com: updated description per comments from Nishant] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Stefan Roese 提交于
These baseboards are equipped with the Technexion TAO35030 SOM. So they include this dtsi. The common parts are extracted into an "common" dtsi file. The main difference between both boards is, that the *lcd has DSS support enabled for the LCD. Some HEAD acoustics specific features are: - LED handling - Special FPGA/DSP audio driver (not included in this series) - powerdown GPIO Signed-off-by: NStefan Roese <sr@denx.de> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Stefan Roese 提交于
This baseboard is equipped with the Technexion TAO35030 SOM. So includes this dtsi. Some Thunder specific features are: - LCD panel Signed-off-by: NStefan Roese <sr@denx.de> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Stefan Roese 提交于
The Technexion TAO3530 is a OMAP3530 based SOM. This patch adds the basic support for it as an dtsi file which can be included by baseboard equipped with this SOM. E.g. the Technexion Thunder baseboard. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Stefan Roese 提交于
Set internal clock source for MMC2 on tao3530. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Nishanth Menon 提交于
AM57xx processor family are variants of DRA7 family of processors and targetted at industrial and non-automotive applications. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy J 提交于
DRA72x-evm uses TPS65917 PMIC. Add the node. NOTE: LDO2 is actually unused, but the usage if any is expected to be between 1.8 to 3.3v IO voltage. So define the node. NOTE: Interrupt used is crossbar number based. Tested-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy J 提交于
I2C1 bus is used for the following peripherals P8 connector (MLB) TLV320AIC3106 Audio codec J15 LCD header 24WC256 eeprom TMP102AIDRLT temperature sensor PCF8575 GPIO expander PCA9306 i2c voltage translator -> Goes to P9 for comm interface P2 expansion connector TPS65917 PMIC The slowest speed of all the peripherals seems to be 400KHz. Tested-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 9月, 2014 2 次提交
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由 Guenter Roeck 提交于
unicore32 builds fail with arch/unicore32/kernel/signal.c: In function ‘setup_frame’: arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c: In function ‘handle_signal’: arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’ arch/unicore32/kernel/signal.c: In function ‘do_signal’: arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’ make[1]: *** [arch/unicore32/kernel/signal.o] Error 1 make: *** [arch/unicore32/kernel/signal.o] Error 2 Bisect points to commit 649671c9 ("unicore32: Use get_signal() signal_setup_done()"). This code never even compiled. Reverting the patch does not work, since previously used functions no longer exist, so try to fix it up. Compile tested only. Fixes: 649671c9 ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <richard@nod.at> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Alex Shi 提交于
With ARCH_VEXPRESS_SPC option, kernel build has the following warning: arch/arm/mach-vexpress/spc.c: In function ‘ve_spc_clk_init’: arch/arm/mach-vexpress/spc.c:431:38: warning: array subscript is below array bounds [-Warray-bounds] struct ve_spc_opp *opps = info->opps[cluster]; ^ since 'cluster' maybe '-1' in UP system. This patch does a active checking to fix this issue. Signed-off-by: NAlex Shi <alex.shi@linaro.org> Acked-by: NPawel Moll <pawel.moll@arm.com> Acked-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 30 8月, 2014 8 次提交
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由 Michael Welling 提交于
Without this patch the kexec-purgatory.c and purgatory.ro files are not removed after make mrproper. Signed-off-by: NMichael Welling <mwelling@ieee.org> Acked-by: NVivek Goyal <vgoyal@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Pranith Kumar 提交于
Fix building errors occuring due to a missing export of flush_icache_range() in kisskb.ellerman.id.au/kisskb/buildresult/11677809/ ERROR: "flush_icache_range" [drivers/misc/lkdtm.ko] undefined! Signed-off-by: NPranith Kumar <bobby.prani@gmail.com> Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> [arc] Acked-by: Richard Kuo <rkuo@codeaurora.org> [hexagon] Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa] Cc: Noam Camus <noamc@ezchip.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Acked-by: Zhigang Lu <zlu@tilera.com> [tile] Cc: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Vivek Goyal 提交于
Thomas reported that build of x86_64 kernel was failing for him. He is using 32bit tool chain. Problem is that while compiling purgatory, I have not specified -m64 flag. And 32bit tool chain must be assuming -m32 by default. Following is error message. (mini) [~/work/linux-2.6] make scripts/kconfig/conf --silentoldconfig Kconfig CHK include/config/kernel.release UPD include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h UPD include/generated/utsrelease.h CC arch/x86/purgatory/purgatory.o arch/x86/purgatory/purgatory.c:1:0: error: code model 'large' not supported in the 32 bit mode Fix it by explicitly passing appropriate -m64/-m32 build flag for purgatory. Reported-by: NThomas Glanzmann <thomas@glanzmann.de> Tested-by: NThomas Glanzmann <thomas@glanzmann.de> Suggested-by: NH. Peter Anvin <hpa@zytor.com> Signed-off-by: NVivek Goyal <vgoyal@redhat.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Vivek Goyal 提交于
New system call depends on crypto. As it did not have a separate config option, CONFIG_KEXEC was modified to select CRYPTO and CRYPTO_SHA256. But now previous patch introduced a new config option for new syscall. So CONFIG_KEXEC does not require crypto. Remove that dependency. Signed-off-by: NVivek Goyal <vgoyal@redhat.com> Cc: Eric Biederman <ebiederm@xmission.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Shaun Ruffell <sruffell@digium.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Vivek Goyal 提交于
Currently new system call kexec_file_load() and all the associated code compiles if CONFIG_KEXEC=y. But new syscall also compiles purgatory code which currently uses gcc option -mcmodel=large. This option seems to be available only gcc 4.4 onwards. Hiding new functionality behind a new config option will not break existing users of old gcc. Those who wish to enable new functionality will require new gcc. Having said that, I am trying to figure out how can I move away from using -mcmodel=large but that can take a while. I think there are other advantages of introducing this new config option. As this option will be enabled only on x86_64, other arches don't have to compile generic kexec code which will never be used. This new code selects CRYPTO=y and CRYPTO_SHA256=y. And all other arches had to do this for CONFIG_KEXEC. Now with introduction of new config option, we can remove crypto dependency from other arches. Now CONFIG_KEXEC_FILE is available only on x86_64. So whereever I had CONFIG_X86_64 defined, I got rid of that. For CONFIG_KEXEC_FILE, instead of doing select CRYPTO=y, I changed it to "depends on CRYPTO=y". This should be safer as "select" is not recursive. Signed-off-by: NVivek Goyal <vgoyal@redhat.com> Cc: Eric Biederman <ebiederm@xmission.com> Cc: H. Peter Anvin <hpa@zytor.com> Tested-by: NShaun Ruffell <sruffell@digium.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Hugh Dickins 提交于
Sasha Levin has shown oopses on ffffea0003480048 and ffffea0003480008 at mm/memory.c:1132, running Trinity on different 3.16-rc-next kernels: where zap_pte_range() checks page->mapping to see if PageAnon(page). Those addresses fit struct pages for pfns d2001 and d2000, and in each dump a register or a stack slot showed d2001730 or d2000730: pte flags 0x730 are PCD ACCESSED PROTNONE SPECIAL IOMAP; and Sasha's e820 map has a hole between cfffffff and 100000000, which would need special access. Commit c46a7c81 ("x86: define _PAGE_NUMA by reusing software bits on the PMD and PTE levels") has broken vm_normal_page(): a PROTNONE SPECIAL pte no longer passes the pte_special() test, so zap_pte_range() goes on to try to access a non-existent struct page. Fix this by refining pte_special() (SPECIAL with PRESENT or PROTNONE) to complement pte_numa() (SPECIAL with neither PRESENT nor PROTNONE). A hint that this was a problem was that c46a7c81 added pte_numa() test to vm_normal_page(), and moved its is_zero_pfn() test from slow to fast path: This was papering over a pte_special() snag when the zero page was encountered during zap. This patch reverts vm_normal_page() to how it was before, relying on pte_special(). It still appears that this patch may be incomplete: aren't there other places which need to be handling PROTNONE along with PRESENT? For example, pte_mknuma() clears _PAGE_PRESENT and sets _PAGE_NUMA, but on a PROT_NONE area, that would make it pte_special(). This is side-stepped by the fact that NUMA hinting faults skipped PROT_NONE VMAs and there are no grounds where a NUMA hinting fault on a PROT_NONE VMA would be interesting. Fixes: c46a7c81 ("x86: define _PAGE_NUMA by reusing software bits on the PMD and PTE levels") Reported-by: NSasha Levin <sasha.levin@oracle.com> Tested-by: NSasha Levin <sasha.levin@oracle.com> Signed-off-by: NHugh Dickins <hughd@google.com> Signed-off-by: NMel Gorman <mgorman@suse.de> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Cyrill Gorcunov <gorcunov@gmail.com> Cc: Matthew Wilcox <matthew.r.wilcox@intel.com> Cc: <stable@vger.kernel.org> [3.16] Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Will Deacon 提交于
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O writes with weaker barrier semantics than the non-relaxed variants. This patch implements these write macros for Alpha, in the same vein as the relaxed read macros, which are already implemented. Acked-by: NRichard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Michael Cree 提交于
Signed-off-by: NMichael Cree <mcree@orcon.net.nz> Signed-off-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 29 8月, 2014 1 次提交
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由 Jiang Liu 提交于
Now IOAPIC driver dynamically allocates IRQ numbers for IOAPIC pins. We need to keep IRQ assignment for PCI devices during runtime power management, otherwise it may cause failure of device wakeups. Commit 3eec5952 "x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernation" has fixed the issue for suspend/ hibernation, we also need the same fix for runtime device sleep too. Fix: https://bugzilla.kernel.org/show_bug.cgi?id=83271Reported-and-Tested-by: NEmanueL Czirai <amanual@openmailbox.org> Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: EmanueL Czirai <amanual@openmailbox.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Grant Likely <grant.likely@linaro.org> Link: http://lkml.kernel.org/r/1409304383-18806-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 28 8月, 2014 3 次提交
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由 Tony Lindgren 提交于
Commit 43fef47f (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle) added support for configuring the PMIC to cut off resources during deeper idle states to save power. This however caused regression for n900 display power that needed the PMIC configuration to be disabled with commit d937678a (ARM: dts: Revert enabling of twl configuration for n900). Turns out the root cause of the problem is that we must use TWL4030_RESCONFIG_UNDEF instead of DEV_GRP_NULL to avoid disabling regulators that may have been enabled before the init function for twl4030-power.c runs. With TWL4030_RESCONFIG_UNDEF we let the regulator framework control the regulators like it should. Here we need to only configure the sys_clken and sys_off_mode triggers for the regulators that cannot be done by the regulator framework as it's not running at that point. This allows us to enable the PMIC configuration for n900. Fixes: 43fef47f (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle) Cc: stable@vger.kernel.org # v3.16 Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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由 Rajendra Nayak 提交于
To deal with IPs which are specific to dra74x and dra72x, maintain seperate ocp interface lists, while keeping the common list for all common IPs. Move USB OTG SS4 to dra74x only list since its unavailable in dra72x and is giving an abort during boot. The dra72x only list is empty for now and a placeholder for future hwmod additions which are specific to dra72x. Fixes: d904b38d ("ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss") Reported-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Tested-by: NNishanth Menon <nm@ti.com> [paul@pwsan.com: fixed comment style to conform with CodingStyle] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
Use the corresponding compatibles to identify the devices. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 27 8月, 2014 6 次提交
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由 Juri Lelli 提交于
Commit af040ffc ("ARM: make it easier to check the CPU part number correctly") changed ARM_CPU_PART_X masks, and the way they are returned and checked against. Usage of read_cpuid_part_number() is now deprecated, and calling places updated accordingly. This actually broke cpuidle-big_little initialization, as bl_idle_driver_init() performs a check using an hardcoded mask on cpu_id. Create an interface to perform the check (that is now even easier to read). Define also a proper mask (ARM_CPU_PART_MASK) that makes this kind of checks cleaner and helps preventing bugs in the future. Update usage accordingly. Signed-off-by: NJuri Lelli <juri.lelli@arm.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mark Rutland 提交于
On revisions of Cortex-A15 prior to r3p3, a CLREX instruction at PL1 may falsely trigger a watchpoint exception, leading to potential data aborts during exception return and/or livelock. This patch resolves the issue in the following ways: - Replacing our uses of CLREX with a dummy STREX sequence instead (as we did for v6 CPUs). - Removing the clrex code from v7_exit_coherency_flush and derivatives, since this only exists as a minor performance improvement when non-cached exclusives are in use (Linux doesn't use these). Benchmarking on a variety of ARM cores revealed no measurable performance difference with this change applied, so the change is performed unconditionally and no new Kconfig entry is added. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mark Rutland 提交于
The ARMv6 and ARMv7 early abort handlers clear the exclusive monitors upon entry to the kernel, but this is redundant: - We clear the monitors on every exception return since commit 200b812d ("Clear the exclusive monitor when returning from an exception"), so this is not necessary to ensure the monitors are cleared before returning from a fault handler. - Any dummy STREX will target a temporary scratch area in memory, and may succeed or fail without corrupting useful data. Its status value will not be used. - Any other STREX in the kernel must be preceded by an LDREX, which will initialise the monitors consistently and will not depend on the earlier state of the monitors. Therefore we have no reason to care about the initial state of the exclusive monitors when a data abort is taken, and clearing the monitors prior to exception return (as we already do) is sufficient. This patch removes the redundant clearing of the exclusive monitors from the early abort handlers. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NWill Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Andrey Ryabinin 提交于
Kernel module build with GCOV profiling fails to load with the following error: $ insmod test_module.ko test_module: unknown relocation: 38 insmod: can't insert 'test_module.ko': invalid module format This happens because constructor pointers in the .init_array section have not supported R_ARM_TARGET1 relocation type. Documentation (ELF for the ARM Architecture) says: "The relocation must be processed either in the same way as R_ARM_REL32 or as R_ARM_ABS32: a virtual platform must specify which method is used." Since kernel expects to see absolute addresses in .init_array R_ARM_TARGET1 relocation type should be treated the same way as R_ARM_ABS32. Signed-off-by: NAndrey Ryabinin <a.ryabinin@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Jiang Liu 提交于
Commit 15a3c7cc "x86, irq: Introduce two helper functions to support irqdomain map operation" breaks LPSS ACPI enumerated devices. On startup, IOAPIC driver preallocates IRQ descriptors and programs IOAPIC pins with default level and polarity attributes for all legacy IRQs. Later legacy IRQ users may fail to set IOAPIC pin attributes if the requested attributes conflicts with the default IOAPIC pin attributes. So change mp_irqdomain_map() to allow the first legacy IRQ user to reprogram IOAPIC pin with different attributes. Reported-and-tested-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Prarit Bhargava <prarit@redhat.com> Link: http://lkml.kernel.org/r/1409118795-17046-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Rabeeh Khoury 提交于
This patch is important for the MicroSOM implementation due to the following details - 1. VIH of the Atheros phy is 1.7V. 2. NVCC_ENET which is the power domain of the MDIO pad is driven by the PHY's LDO (i.e. either 1.8v or 2.5v). 3. The MicroSOM implements an onbouard 1.6kohm pull up to 3.3v (R3000). In the case the PHY's LDO was 1.8v then there would be only a 100mV margin for the signal to be acknowledged as high (1.8v-1.7v). Due to that setting the pad as an open drain will let the 1.6kohm pull that signal high to 3.3 that assures enough margins to the PHY to be acked as '1' logic. Signed-off-by: NRabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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