- 03 12月, 2014 1 次提交
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由 Matthieu Crapet 提交于
When a pin is configured as GPIO, print also direction (input or output). Signed-off-by: NMatthieu Crapet <mcrapet@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 10月, 2014 2 次提交
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由 Alexandre Belloni 提交于
Copy the mach/at91_pio.h header locally and use it for pinctrl-at91.c. This allows to remove the dependency on mach/at91_pio.h to be able to move at91 to multiplatform. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexandre Courbot 提交于
This function actually operates on a gpio_chip, so its prefix should reflect that fact for consistency with other functions defined in gpio/driver.h. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 20 10月, 2014 1 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 23 9月, 2014 3 次提交
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由 Wenyou Yang 提交于
Disable Pull-Down or Pull-Up property before enabling Pull-Up or Pull-Down, because the pin's Pull-Up and Pull-Down property is mutually exclusive. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Pramod Gurav 提交于
This patch removes a call to panic function when gpiochio_irqchip_add fails and just returns the error to the calling function. Same return value is used to handle the error case and adds a lable to release resources on error. The error message has been improved to indicate failure to add irqchip to gpiochip. This also changes first argument to function at91_gpio_of_irq_setup from struct device_node to struct platform_device. Because The device_node argument was anyway not being used. Passed pdev so that on failure dev_err can use &pdev->dev and log can be associated with proper device. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NPramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Pramod Gurav 提交于
This fixes the whole error handling in probe function by capturing and returning error values on kernel function like clk_prepare, clk_enable, gpiochip_add etc. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NPramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 9月, 2014 2 次提交
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由 Pramod Gurav 提交于
This patch switches to using managed version of clk_get and hence removes clk_put from failure path. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NPramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Roszko 提交于
The SAMA5 and SAM9x5 series both have drive strength options for the PIOs. This patch adds the ability to set one of three hardware options for drive strengths of low, medium or high for the each pin. The actual current output of the chip based on the setting is defined in the datasheets and varies per pins separate from banks and with supply voltage. This patch adds three new dt-bindings that allow setting the strength when configuring pins. By default, no change will be made to the drive strength of a pin from its reset value. Due to the difference between the register addresses of the SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added. Signed-off-by: NMarek Roszko <mark.roszko@gmail.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 9月, 2014 1 次提交
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由 Linus Walleij 提交于
commit 2243a87d "pinctrl: avoid duplicated calling enable_pinmux_setting for a pin" removed the .disable callback from the struct pinmux_ops, making the .enable() callback the only remaining callback. However .enable() is a bad name as it seems to imply that a muxing can also be disabled. Rename the callback to .set_mux() and also take this opportunity to clean out any remaining mentions of .disable() from the documentation. Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: NFan Wu <fwu@marvell.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 8月, 2014 1 次提交
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由 Hans Wennborg 提交于
The prefix suggests the number should be printed in hex, so use the %x specifier to do that. Found by using regex suggested by Joe Perches. Signed-off-by: NHans Wennborg <hans@hanshq.net> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 7月, 2014 3 次提交
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由 Rickard Strandqvist 提交于
Remove variable that are never used This was found using a static code analysis program called cppcheck. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rickard Strandqvist 提交于
Remove checking if a unsigned is less than zero This was found using a static code analysis program called cppcheck. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Fan Wu 提交于
What the patch does: 1. Call pinmux_disable_setting ahead of pinmux_enable_setting each time pinctrl_select_state is called 2. Remove the HW disable operation in pinmux_disable_setting function. 3. Remove the disable ops in struct pinmux_ops 4. Remove all the disable ops users in current code base. Notes: 1. Great thanks for the suggestion from Linus, Tony Lindgren and Stephen Warren and Everyone that shared comments on this patch. 2. The patch also includes comment fixes from Stephen Warren. The reason why we do this: 1. To avoid duplicated calling of the enable_setting operation without disabling operation inbetween which will let the pin descriptor desc->mux_usecount increase monotonously. 2. The HW pin disable operation is not useful for any of the existing platforms. And this can be used to avoid the HW glitch after using the item #1 modification. In the following case, the issue can be reproduced: 1. There is a driver that need to switch pin state dynamically, e.g. between "sleep" and "default" state 2. The pin setting configuration in a DTS node may be like this: component a { pinctrl-names = "default", "sleep"; pinctrl-0 = <&a_grp_setting &c_grp_setting>; pinctrl-1 = <&b_grp_setting &c_grp_setting>; } The "c_grp_setting" config node is totally identical, maybe like following one: c_grp_setting: c_grp_setting { pinctrl-single,pins = <GPIO48 AF6>; } 3. When switching the pin state in the following official pinctrl sequence: pin = pinctrl_get(); state = pinctrl_lookup_state(wanted_state); pinctrl_select_state(state); pinctrl_put(); Test Result: 1. The switch is completed as expected, that is: the device's pin configuration is changed according to the description in the "wanted_state" group setting 2. The "desc->mux_usecount" of the corresponding pins in "c_group" is increased without being decreased, because the "desc" is for each physical pin while the setting is for each setting node in the DTS. Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount will keep increasing without any chance to be decreased. According to the comments in the original code, only the setting, in old state but not in new state, will be "disabled" (calling pinmux_disable_setting), which is correct logic but not intact. We still need consider case that the setting is in both old state and new state. We can do this in the following two ways: 1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin setting" repeatedly 2. "Disable"(calling pinmux_disable_setting) the "same pin setting", actually two setting instances, ahead of enabling them. Analysis: 1. The solution #2 is better because it can avoid too much iteration. 2. If we disable all of the settings in the old state and one of the setting(s) exist in the new state, the pins mux function change may happen when some SoC vendors defined the "pinctrl-single,function-off" in their DTS file. old_setting => disabled_setting => new_setting. 3. In the pinmux framework, when a pin state is switched, the setting in the old state should be marked as "disabled". Conclusion: 1. To Remove the HW disabling operation to above the glitch mentioned above. 2. Handle the issue mentioned above by disabling all of the settings in old state and then enable the all of the settings in new state. Signed-off-by: NFan Wu <fwu@marvell.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NPatrice Chotard <patrice.chotard@st.com> Acked-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NMaxime Coquelin <maxime.coquelin@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 5月, 2014 1 次提交
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由 Alexander Stein 提交于
With commit 80cc3732 (pinctrl/at91: convert driver to use gpiolib irqchip) gpiochip_set_chained_irqchip is called for PIOC, PIOD and PIOE. The associated GPIO chip for the IRQ chip is overwritten each time, because they share the same hard IRQ line. Thus if an IRQ occurs on PIOC or PIOD, gpio_irq_handler will only check on PIOE (the assigned GPIO chip) where no event occured. Thus the IRQ will not be cleared, retriggering the ISR. Fix that (like done before) by only set the PIOC GPIO chip to the IRQ chip and walk the list in the irq handler. Signed-off-by: NAlexander Stein <alexanders83@web.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 4月, 2014 2 次提交
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由 Alexander Stein 提交于
pin_to_mask expects a bank pin number. So do not add the chip base. Without that patch cat /sys/kernel/debug/gpio looks like that: GPIOs 0-31, platform/fffff200.gpio, fffff200.gpio: [spi32766.0] GPIOfffff200.gpio5: [gpio] set [ads7846_pendown] GPIOfffff200.gpio15: [gpio] set [ohci_vbus] GPIOfffff200.gpio21: [gpio] set [ohci_vbus] GPIOfffff200.gpio24: [gpio] set [button1] GPIOfffff200.gpio28: [gpio] clear [button2] GPIOfffff200.gpio29: [gpio] clear GPIOs 32-63, platform/fffff400.gpio, fffff400.gpio: [sda] GPIOfffff400.gpio4: [periph A] [scl] GPIOfffff400.gpio5: [periph A] [spi32766.3] GPIOfffff400.gpio11: [periph A] [error] GPIOfffff400.gpio22: [periph A] [run] GPIOfffff400.gpio23: [periph A] GPIOs 64-95, platform/fffff600.gpio, fffff600.gpio: [reset_pin] GPIOfffff600.gpio29: [periph A] GPIOs 96-127, platform/fffff800.gpio, fffff800.gpio: [led1] GPIOfffff800.gpio5: [periph A] [led2] GPIOfffff800.gpio6: [periph A] [led3] GPIOfffff800.gpio7: [periph A] [led4] GPIOfffff800.gpio8: [periph A] GPIOs 128-159, platform/fffffa00.gpio, fffffa00.gpio: [button3] GPIOfffffa00.gpio10: [periph A] [button4] GPIOfffffa00.gpio12: [periph A] Note that every bank despite bank 0 only shows "periph A" which are obviously used as GPIOs. Signed-off-by: NAlexander Stein <alexanders83@web.de> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexander Stein 提交于
This converts the AT91 pin control driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: NAlexander Stein <alexanders83@web.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 2月, 2014 1 次提交
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由 Richard Genoud 提交于
This is needed for gpiod_get_direction(). Otherwise, it returns -EINVAL. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 2月, 2014 1 次提交
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由 Jean-Jacques Hiblot 提交于
When an IRQ is started on a GPIO line, mark this GPIO as IRQ in the gpiolib so we can keep track of the usage centrally. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@traphandler.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 2月, 2014 1 次提交
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由 Nicolas Ferre 提交于
When setting the gpio irq type, use the __irq_set_handler_locked() variant instead of the irq_set_handler() to prevent false spinlock recursion warning. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # v3.12 Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 12月, 2013 2 次提交
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由 Boris BREZILLON 提交于
Replace the clk_prepare and clk_enable calls by a single clk_prepare_enable call. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Boris BREZILLON 提交于
clk_unprepare shall be called before clk_disable. Fix the issue by replacing the clk_unprepare and clk_disable calls by a single clk_disable_unprepare call. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 12月, 2013 1 次提交
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由 Alexandre Belloni 提交于
This allows to get the pin configuration by using debugfs. On my system: # cat /sys/kernel/debug/pinctrl/pinctrl.3/pinconf-pins Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 12 12月, 2013 2 次提交
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由 Alexandre Belloni 提交于
When passing a not initialized config parameter, at91_pinconf_get() would return a bogus value. Fix that by initializing it to zero before using it. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexandre Belloni 提交于
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 12月, 2013 1 次提交
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由 Linus Walleij 提交于
This switches the two members of struct gpio_chip that were defined as unsigned foo:1 to bool, because that is indeed what they are. Switch all users in the gpio and pinctrl subsystems to assign these values with true/false instead of 0/1. The users outside these subsystems will survive since true/false is 1/0, atleast we set some kind of more strict typing example. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 11月, 2013 1 次提交
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由 Linus Walleij 提交于
The #define for the maximum number of GPIO blocks was retrieved into pinctrl-at91.c by implicit inclusion of <mach/gpio.h> from <linux/gpio.h> creating a dependency on machine-local <mach/gpio.h>. Break the depenency by copying this single define into the driver. Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 10月, 2013 1 次提交
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由 Alexandre Belloni 提交于
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 10月, 2013 1 次提交
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由 Sachin Kamat 提交于
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. This is a squash commit of: pinctrl: at91: Remove redundant of_match_ptr pinctrl: exynos5440: Remove redundant of_match_ptr pinctrl: imx35: Remove redundant of_match_ptr pinctrl: imx51: Remove redundant of_match_ptr pinctrl: imx53: Remove redundant of_match_ptr pinctrl: imx6dl: Remove redundant of_match_ptr pinctrl: imx6q: Remove redundant of_match_ptr pinctrl: samsung: Remove redundant of_match_ptr pinctrl: vf610: Remove redundant of_match_ptr pinctrl: imx6sl: Remove redundant of_match_ptr pinctrl: plgpio: Remove redundant of_match_ptr Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 9月, 2013 2 次提交
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由 Boris BREZILLON 提交于
Replace at91_mux_get_deglitch with at91_mux_pio3_get_deglitch when using sam9x5 (pio3) IP. at91_mux_get_deglitch only test the activation of the "Input Filter" which may be overloaded by the activation of the "Input Filter Slow Clock" to use the input filter as a debounce filter instead of a deglitch filter. Fix at91_mux_pio3_get_debounce to test the activation of the Input Filter before testing the activation of the debounce filter (Input Filter Slow Clock depends on Input Filter). Fix at91_mux_pio3_set_debounce function to avoid disabling the deglitch filter ("Input Filter") when debounce filter is disabled. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Boris BREZILLON 提交于
Fix AT91_PINCTRL_DEBOUNCE_VAL dt macro typo. Fix at91_pinctrl_mux_ops callback typos. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 8月, 2013 1 次提交
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由 Boris BREZILLON 提交于
In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the pullup/down for this pin (pin is represented as a bit position) is disabled. Cc: stable <stable@vger.kernel.org> # 3.8+ Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 8月, 2013 1 次提交
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由 Sherman Yin 提交于
When setting pin configuration in the pinctrl framework, pin_config_set() or pin_config_group_set() is called in a loop to set one configuration at a time for the specified pin or group. This patch 1) removes the loop and 2) changes the API to pass the whole pin config array to the driver. It is now up to the driver to loop through the configs. This allows the driver to potentially combine configs and reduce the number of writes to pin config registers. All c files changed have been build-tested to verify the change compiles and that the corresponding .o is successfully generated. Signed-off-by: NSherman Yin <syin@broadcom.com> Reviewed-by: NChristian Daudt <csd@broadcom.com> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 8月, 2013 1 次提交
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由 Boris BREZILLON 提交于
The current implementation handle both edge and level interrupts with the 'handle_simple_irq' handler. Level interrupts are active as long as the pin stays at the configured level (low or high). In this case we have to use 'handle_level_irq' which mask the interrupt until the handle has treated it. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Tested-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 6月, 2013 1 次提交
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由 Wolfram Sang 提交于
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 3月, 2013 2 次提交
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由 Sachin Kamat 提交于
Fixes the following types of checkpatch errors: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: space required before the open parenthesis '(' ERROR: "(foo*)" should be "(foo *)" ERROR: space required after that ',' (ctx:WxV) ERROR: "(foo*const*)" should be "(foo *const*)" ERROR: space required before that '*' (ctx:VxB) Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Sachin Kamat 提交于
const declared twice. Fixes the following sparse warning: drivers/pinctrl/pinctrl-at91.c:815:21: warning: duplicate const drivers/pinctrl/pinctrl-at91.c:849:21: warning: duplicate const Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 3月, 2013 1 次提交
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由 Catalin Marinas 提交于
These functions have been introduced by commit 10a8c383 (irq: introduce entry and exit functions for chained handlers) in asm/mach/irq.h. This patch moves them to linux/irqchip/chained_irq.h so that generic irqchip drivers do not rely on architecture specific header files. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NMarc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com>
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- 14 3月, 2013 1 次提交
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由 Ludovic Desroches 提交于
gpio suspend/resume and wakeup sources where not managed when using pinctrl so it was impossible to wake up the system with a gpio. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 07 3月, 2013 1 次提交
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由 Laurent Pinchart 提交于
The pinconf, pinctrl and pinmux operation structures hold function pointers that are never modified. Declare them as const. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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