- 27 2月, 2012 2 次提交
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由 Heikki Krogerus 提交于
This changes the otg functions so that they receive struct otg instead of struct usb_phy as parameter and converts all users of these functions to pass the otg member of their usb_phy. Includes fixes to IMX code from Sascha Hauer. [ balbi@ti.com : fixed a compile warning on ehci-mv.c ] Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NPavankumar Kondeti <pkondeti@codeaurora.org> Acked-by: NLi Yang <leoli@freescale.com> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Reviewed-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Heikki Krogerus 提交于
Use the new usb_phy_* functions with transceiver operations instead of the old otg functions. Includes fixes from Sascha Hauer. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NPavankumar Kondeti <pkondeti@codeaurora.org> Acked-by: NLi Yang <leoli@freescale.com> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Reviewed-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 13 2月, 2012 1 次提交
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由 Heikki Krogerus 提交于
This is the first step in separating USB transceivers from USB OTG utilities. Includes fixes to IMX code from Sascha Hauer. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NPavankumar Kondeti <pkondeti@codeaurora.org> Acked-by: NLi Yang <leoli@freescale.com> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 08 12月, 2011 1 次提交
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由 Olof Johansson 提交于
Rely on platform_data being passed through auxdata for now; more elaborate bindings for phy config and tunings to be added. v2: moved vbus-gpio check to the helper function, added check for !of_node, added usb2 clock to board-dt table. Signed-off-by: NOlof Johansson <olof@lixom.net> Cc: Greg Kroah-Hartman <gregkh@suse.de> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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- 18 9月, 2011 1 次提交
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由 Yong Zhang 提交于
This flag is a NOOP and can be removed now. Signed-off-by: NYong Zhang <yong.zhang0@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 04 5月, 2011 1 次提交
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由 Jan Andersson 提交于
The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: NJan Andersson <jan@gaisler.com> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 30 4月, 2011 1 次提交
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由 Jim Lin 提交于
Tegra USB1 port needs to issue Port Reset twice internally, otherwise it fails to enumerate devices attached to it Signed-off-by: NJim Lin <jilin@nvidia.com> Signed-off-by: NOlof Johansson <olofj@chromium.org> [ squash two patches into one and minor style cleanups ] Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 12 3月, 2011 2 次提交
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由 Robert Morell 提交于
The Tegra2 USB controller doesn't properly deal with misaligned DMA buffers, causing corruption. This is especially prevalent with USB network adapters, where skbuff alignment is often in the middle of a 4-byte dword. To avoid this, allocate a temporary buffer for the DMA if the provided buffer isn't sufficiently aligned. Signed-off-by: NRobert Morell <rmorell@nvidia.com> Signed-off-by: NBenoit Goby <benoit@android.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Benoit Goby 提交于
The Tegra 2 SoC has 3 EHCI compatible USB controllers. This patch adds the necessary glue to allow the ehci-hcd driver to work on Tegra 2 SoCs. The platform data is used to configure board-specific phy settings and to configure the operating mode, as one of the ports may be used as a otg port. For additional power saving, the driver supports powering down the phy on bus suspend when it is used, for example, to connect an internal device that use an out-of-band remote wakeup mechanism (e.g. a gpio). Signed-off-by: NBenoit Goby <benoit@android.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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