1. 07 4月, 2009 3 次提交
    • R
      V4L/DVB (11321): pxa_camera: Redesign DMA handling · 256b0233
      Robert Jarzmik 提交于
      The DMA transfers in pxa_camera showed some weaknesses in
      multiple queued buffers context :
       - poll/select problem
         The bug shows up with capture_example tool from v4l2 hg
         tree. The process just "stalls" on a "select timeout".
      
       - multiple buffers DMA starting
         When multiple buffers were queued, the DMA channels were
         always started right away. This is not optimal, as a
         special case appears when the first EOF was not yet
         reached, and the DMA channels were prematurely started.
      
       - Maintainability
         DMA code was a bit obfuscated. Rationalize the code to be
         easily maintainable by anyone.
      
       - DMA hot chaining
         DMA is not stopped anymore to queue a buffer, the buffer
         is queued with DMA running. As a tribute, a corner case
         exists where chaining happens while DMA finishes the
         chain, and the capture is restarted to deal with the
         missed link buffer.
      
      This patch attemps to address these issues / improvements.
      
       create mode 100644 Documentation/video4linux/pxa_camera.txt
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      256b0233
    • R
      V4L/DVB (11320): pxa_camera: Remove YUV planar formats hole · 37f5aefd
      Robert Jarzmik 提交于
      All planes were PAGE aligned (ie. 4096 bytes aligned). This
      is not consistent with YUV422 format, which requires Y, U
      and V planes glued together.  The new implementation forces
      the alignement on 8 bytes (DMA requirement), which is almost
      always the case (granted by width x height being a multiple
      of 8).
      
      The test cases include tests in both YUV422 and RGB565 :
       - a picture of size 111 x 111 (cross RAM pages example)
       - a picture of size 1023 x 4 in (under 1 RAM page)
       - a picture of size 1024 x 4 in (exactly 1 RAM page)
       - a picture of size 1025 x 4 in (over 1 RAM page)
       - a picture of size 1280 x 1024 (many RAM pages)
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      37f5aefd
    • R
      V4L/DVB (11319): pxa_camera: Enforce YUV422P frame sizes to be 16 multiples · 92a8337b
      Robert Jarzmik 提交于
      Due to DMA constraints, the DMA chain always transfers bytes
      from the QCI fifos to memory in 8 bytes units. In planar
      formats, that could mean 0 padding between Y and U plane
      (and between U and V plane), which is against YUV422P
      standard.
      
      Therefore, a frame size is required to be a multiple of 16
      (so U plane size is a multiple of 8). It is enforced in
      try_fmt() and set_fmt() primitives, be aligning height then
      width on 4 multiples as need be, to reach a 16 multiple.
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      92a8337b
  2. 30 3月, 2009 2 次提交
  3. 09 3月, 2009 1 次提交
    • E
      [ARM] pxa: move DMA registers definitions into <mach/dma.h> · 7ebc8d56
      Eric Miao 提交于
      1. Driver code where pxa_request_dma() is called will most likely
         reference DMA registers as well,  and it is really unnecessary
         to include pxa-regs.h just for this. Move the definitions into
         <mach/dma.h> and make relevant drivers include it instead of
         <mach/pxa-regs.h>.
      
      2. Introduce DMAC_REGS_VIRT as the virtual address base for these
         DMA registers. This allows later processors to re-use the same
         IP while registers may start at different I/O address.
      Signed-off-by: NEric Miao <eric.miao@marvell.com>
      7ebc8d56
  4. 27 2月, 2009 1 次提交
  5. 08 1月, 2009 1 次提交
  6. 30 12月, 2008 10 次提交
  7. 02 12月, 2008 1 次提交
  8. 27 11月, 2008 1 次提交
  9. 12 10月, 2008 2 次提交
  10. 08 10月, 2008 1 次提交
  11. 07 8月, 2008 1 次提交
  12. 06 8月, 2008 2 次提交
  13. 20 7月, 2008 2 次提交
  14. 27 6月, 2008 1 次提交
  15. 25 4月, 2008 9 次提交