1. 27 1月, 2015 2 次提交
    • M
      drm/i915: Add atomic_get_property entrypoint for connectors (v2) · 2545e4a6
      Matt Roper 提交于
      Even though we only support atomic plane updates at the moment, we still
      need to add an .atomic_get_property() entrypoint for connectors before
      we allow the driver to flip on the DRIVER_ATOMIC bit.  As soon as that
      bit gets set, the DRM core will start adding atomic connector properties
      (in addition to the plane properties we care about at the moment), so we
      need to be able to handle the new way the DRM core will interact with
      us.
      
      For simplicity, we just lookup driver-specific connector properties in
      the usual shadow array maintained by the core.  Once we get real atomic
      modeset support for crtc's and planes, this code should be re-written to
      pull the data out of crtc/connector state structures.
      
      v2: Fix intel_dvo and intel_dsi that I missed on the first pass (Ander)
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2545e4a6
    • M
      drm/i915: Add main atomic entrypoints (v2) · 5ee67f1c
      Matt Roper 提交于
      Add the top-level atomic entrypoints for check/commit.  These won't get
      called yet; we still need to either enable the atomic ioctl or switch to
      using the non-transitional atomic helpers for legacy operations.
      
      v2:
       - Use plane->pipe rather than plane->possible_crtcs while ensuring that
         only a single CRTC is in use.  Either way will work fine since i915
         drm_plane's are always tied to a single CRTC, but plane->pipe is
         slightly more intuitive. (Ander)
       - Simplify crtc/connector checking logic. (Ander)
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      5ee67f1c