- 18 3月, 2015 1 次提交
-
-
由 Andreas Bofjall 提交于
Add support for the GPIOs found on the Fintek SuperI/O chip F71869, such as the one found on the Jetway NF96u-525 motherboard, to the f7188x gpio driver. Signed-off-by: NAndreas Bofjall <andreas@gazonk.org> Tested-by: NLes Schaffer <schaffer@optonline.net> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 09 3月, 2015 1 次提交
-
-
由 Kefeng Wang 提交于
Hisilicon arm64 soc uses designWare gpio, re-enable it after commit 1972c97d(gpio: dwapb: fix compile errors). Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 08 3月, 2015 1 次提交
-
-
由 Tien Hock Loh 提交于
Adds a new driver for Altera soft GPIO IP. The driver is able to do read/write and allows GPIO to be a interrupt controller. Tested on Altera GHRD on interrupt handling and IO. v10: - Updated conflicting device tree parameters - Removed unused headers - Used macro instead of magic numbers for ngpio - Code readability cleanup using ?: and temporal variables - Removed leftover garbage and unnecessary function calls - Checked bgpio_init but unusable because Altera GPIO may not be a multiple of 8 bits v9: - Removed duplicated initialization on set_type using temporals to improve code readability in calling generic_handle_irq - Using ?: ternary to reduce code size v8: - Using for_each_set_bit - Added const for struct definition - Removed naggy pr_err - Sort alpha header - Remove unused macros - Use fixed width data types instead of unsigned long - Whitespace issue fixes - Removed _relaxed function for better compatibility across different CPU - Changed irq_create_mapping to platform_get_irq updated implementation to use gpiochip_irqchip_add - Reserve interrupt-cells number 2 in device tree binding for future use - Remove confusing sections on devicetree bindings - Added tristate Kconfig help text v7: - Used dev_warn instead of pr_warn - Clean up unnecesarry if else indentation v6: - Added irq_startup and irq_shutdown - Changed bitwise clamping style - Cleanup bitwise operation to improve readability change naming of mapped irqs from virq to mapped_irq v5: - Dispose irq_domain mapping correctly - Update optional binding description in binding docs v4: - Added vendor prefix to devicetree binding for IP specific properties using MMIO GPIO helper library instead of manually map PIO to memory - altera_gpio_chip inline struct documentation to kerneldoc - Using dev_ print to print a better failure message v2, v3: - Do not reference NO_IRQ - Updated irq_set_type to only allow the hardware configured irq type Signed-off-by: NTien Hock Loh <thloh@altera.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 04 3月, 2015 1 次提交
-
-
由 Geert Uytterhoeven 提交于
Switch the PCF857x GPIO driver to use the gpiolib irqchip helpers. This driver uses a nested threaded interrupt, hence handle_nested_irq() and gpiochip_set_chained_irqchip() must be used. Note that this removes the checks added in commit 21fd3cd1 ("gpio: pcf857x: call the gpio user handler iff gpio_to_irq is done"), as the interrupt mappings are no longer created on-demand by the driver, but by gpiochip_irqchip_add() during initialization. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 02 3月, 2015 1 次提交
-
-
由 Linus Walleij 提交于
Take a sweep to bring the irq support for the MAX732x expanders into the gpiolib core to cut down on duplicated code. Only compile tested! I need some feedback from people using this expander with interrupts to tell me if things go right or wrong when I do this. Cc: Semen Protsenko <semen.protsenko@globallogic.com> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 04 2月, 2015 1 次提交
-
-
由 Kevin Hao 提交于
The PPC_OF is a ppc specific option which is used to mean that the firmware device tree access functions are available. Since all the ppc platforms have a device tree, it is aways set to 'y' for ppc. So it makes no sense to keep a such option in the current kernel. Replace it with PPC. Signed-off-by: NKevin Hao <haokexin@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 20 1月, 2015 3 次提交
-
-
由 Jassi Brar 提交于
Driver for Fujitsu MB86S7x SoCs that have a memory mapped GPIO controller. Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org> Signed-off-by: NAndy Green <andy.green@linaro.org> Signed-off-by: NVincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: NTetsuya Nuriya <nuriya.tetsuya@jp.fujitsu.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
Require that device tree be used with STMPE (all platforms use this) and enforce OF_GPIO, then delete the platform data. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Y Vo 提交于
Driver for standby GPIO controller of APM X-Gene SoCs on arm64. Signed-off-by: NY Vo <yvo@apm.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 16 1月, 2015 7 次提交
-
-
由 Kamlakant Patel 提交于
This patch converts GE GPIO driver to use basic_mmio_gpio generic library. Signed-off-by: NKamlakant Patel <kamlakant.patel@linaro.org> Acked-by: NMartyn Welch <martyn.welch@ge.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Semen Protsenko 提交于
Signed-off-by: NSemen Protsenko <semen.protsenko@globallogic.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Ricardo Ribalda Delgado 提交于
X86 Kconfig symbol is X86, not ARCH_X86. Fixes: c586b3075d5b47d8 (gpio/xilinx: Add support for X86 Arch) Reported-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Geert Uytterhoeven 提交于
Switch the R-Car Gen2 GPIO driver to use the gpiolib irqchip helpers. While doing this also make sure that gpiochip_irqchip_add() is called after the gpiochip itself is registered, as required. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Ricardo Ribalda Delgado 提交于
Core can be accessed via PCIe on X86 platform. This patch also allows the driver to be used as module. Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Chang Rebecca Swee Fun 提交于
Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between the legacy I/O bridge and the GPIO controller. GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC. Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from the suspend power well. This piece of work is derived from Dan O'Donovan's initial work for Quark X1000 enabling. Signed-off-by: NChang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Wei Chen 提交于
The sx150x gpio driver used a loop to set liner irq map for gpio pins. Now we use the irq domain to rebuild this irq mappig and make sure the codes are still compatible to old users. this patch also adds IRQF_ONESHOT flag to fix the IRQ flooding issues. Signed-off-by: NWei Chen <Wei.Chen@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> [Make Kconfig select GPIOLIB_IRQCHIP] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 09 1月, 2015 1 次提交
-
-
由 Kamlakant Patel 提交于
This patch converts MOXART GPIO driver to use basic_mmio_gpio generic library. Signed-off-by: NKamlakant Patel <kamlakant.patel@linaro.org> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Tested-by: NJonas Jensen <jonas.jensen@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 11 11月, 2014 1 次提交
-
-
由 Daniel Baluta 提交于
This patch adds GPIO and IRQ support for the Diolan DLN-2 GPIO module. Information about the USB protocol interface can be found in the Programmer's Reference Manual [1], see section 2.9 for the GPIO module commands and responses. [1] https://www.diolan.com/downloads/dln-api-manual.pdfSigned-off-by: NDaniel Baluta <daniel.baluta@intel.com> Signed-off-by: NOctavian Purdila <octavian.purdila@intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
-
- 28 10月, 2014 1 次提交
-
-
由 Linus Walleij 提交于
Whereas the DWAPB driver does not really depend on the ARM architecture, it uses [readl|writel]_relaxed() not found on arch such as Blackfin, so restrict this to ARM until there is another architecture that can make use of it. It is also using the of_node of the gpiochip, so fix this too by requiring OF_GPIO. All error/warnings: make.cross ARCH=blackfin drivers/gpio/gpio-dwapb.c: In function 'dwapb_irq_handler': drivers/gpio/gpio-dwapb.c:91:2: error: implicit declaration of function 'readl_relaxed' [-Werror=implicit-function-declaration] drivers/gpio/gpio-dwapb.c: In function 'dwapb_configure_irqs': drivers/gpio/gpio-dwapb.c:212:32: error: 'struct gpio_chip' has no member named 'of_node' drivers/gpio/gpio-dwapb.c:221:16: error: 'struct gpio_chip' has no member named 'of_node' drivers/gpio/gpio-dwapb.c: In function 'dwapb_gpio_add_port': drivers/gpio/gpio-dwapb.c:331:14: error: 'struct gpio_chip' has no member named 'of_node' cc1: some warnings being treated as errors Cc: Jamie Iles <jamie@jamieiles.com> Cc: Alan Tull <atull@altera.com> Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 24 10月, 2014 1 次提交
-
-
由 Stefan Agner 提交于
Add a gpiolib and IRQ chip driver for Vybrid ARM SoC using the Vybrid's GPIO and PORT module. The driver is instanced once per each GPIO/PORT module pair and handles 32 GPIO's. Signed-off-by: NStefan Agner <stefan@agner.ch> Acked-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 21 10月, 2014 1 次提交
-
-
由 Alexander Shiyan 提交于
This patch adds driver to support GPIO functionality for 74xx-compatible ICs with MMIO access. Compatible models include: 1 bit: 741G125 (Input), 741G74 (Output) 2 bits: 742G125 (Input), 7474 (Output) 4 bits: 74125 (Input), 74175 (Output) 6 bits: 74365 (Input), 74174 (Output) 8 bits: 74244 (Input), 74273 (Output) 16 bits: 741624 (Input), 7416374 (Output) Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 25 9月, 2014 1 次提交
-
-
由 Uwe Kleine-König 提交于
This change makes it easier to configure a kernel for a real machine by not showing the option to enable it at all if COMPILE_TEST is off. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NMarkus Mayer <mmayer@broadcom.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 23 9月, 2014 1 次提交
-
-
由 Weike Chen 提交于
The Synopsys DesignWare APB GPIO driver only supports open firmware devices. But, like Intel Quark X1000 SOC, which has a single PCI function exporting a GPIO and an I2C controller, it is a Multifunction device. This patch is to enable the current Synopsys DesignWare APB GPIO driver to support the Multifunction device which exports the designware GPIO controller. Reviewed-by: NHock Leong Kweh <hock.leong.kweh@intel.com> Signed-off-by: NWeike Chen <alvin.chen@intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 05 9月, 2014 1 次提交
-
-
由 Sonic Zhang 提交于
Device tree is not enabled in some architecture where gpio driver mcp23s08 is still required. v2-changes: - Parse device tree properties into platform data other than individual variables. v3-changes: - Use of_node in gpio_chip device structure, because the struct device * always has an of_node which is NULL when OF is not used. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 02 9月, 2014 1 次提交
-
-
由 Linus Walleij 提交于
This switches the ADNP GPIO driver to use the gpiolib irqchip helpers. Also do some random refactoring to make it look like most other GPIO drivers. Cc: Roland Stigge <stigge@antcom.de> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 28 8月, 2014 1 次提交
-
-
由 Feng Kan 提交于
Add APM X-Gene SoC gpio controller driver. Signed-off-by: NFeng Kan <fkan@apm.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 28 7月, 2014 1 次提交
-
-
由 Mika Westerberg 提交于
Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 10 7月, 2014 1 次提交
-
-
由 Harini Katakam 提交于
Add support for GPIO controller used by Xilinx Zynq. v3 changes: - Use linux/gpio/driver.h instead of linux/gpio.h - Make irq a local variable in probe v2 changes: - convert to pm_runtime_force_(suspend|resume) - add pm_runtime_set_active in probe() - also (un)prepare clocks when they are dis-/enabled - add some missing calls to pm_runtime_get() - use pm_runtime_put() instead of sync variant - remove gpio chip in driver remove() - remove redundant type casts - directly use IO helpers - use BIT macro to set/clear bits - migrate to GPIOLIB_IRQCHIP Signed-off-by: NHarini Katakam <harinik@xilinx.com> Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 19 6月, 2014 1 次提交
-
-
由 Linus Walleij 提交于
This switches the STMPE driver to use the gpiolib irqchip helpers. Tested-by: NSilvio Fricke <silvio.fricke@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 17 6月, 2014 1 次提交
-
-
由 Zhu, Lejun 提交于
Devices based on Intel SoC products such as Baytrail have a Power Management IC. In the PMIC there are subsystems for voltage regulation, A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is called Crystal Cove. This patch adds support for the GPIO function in Crystal Cove. Signed-off-by: NYang, Bin <bin.yang@intel.com> Signed-off-by: NZhu, Lejun <lejun.zhu@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
-
- 29 5月, 2014 1 次提交
-
-
由 Linus Walleij 提交于
These helpers depend on the IRQ_DOMAIN so select it explicitly, as it will not be present on all platforms such as Intel desktops and laptops using Intel-MID. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 28 5月, 2014 1 次提交
-
-
由 Linus Walleij 提交于
This switches the PCA953x driver over to using the gpiolib irqchip helpers to handle the threaded interrups cascaded off this GPIO chip. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 27 5月, 2014 1 次提交
-
-
由 Jean Delvare 提交于
The Renesas R-Car GPIO driver is only useful on shmobile unless build testing. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Magnus Damm <damm@opensource.se> Cc: Alexandre Courbot <gnurou@gmail.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 23 5月, 2014 1 次提交
-
-
由 Jean Delvare 提交于
The gpio-pch driver is for a companion chip to the Intel Atom E600 series processors. These are 32-bit x86 processors so the driver is only needed on X86_32. Add COMPILE_TEST as an alternative, so that the driver can still be build-tested elsewhere. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 09 5月, 2014 1 次提交
-
-
由 Arnd Bergmann 提交于
Commit 4df42de9d3e "gpio: omap: add a GPIO_OMAP option instead of using ARCH_OMAP" made it possible to build OMAP kernels without the GPIO driver, which at least on OMAP2 and OMAP3 causes build errors because of functions used by the platform power management code: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_prepare_for_idle' arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_resume_after_idle' We presumably always want the GPIO driver on OMAP, so this adds a slightly broader dependency and only allows disabling the driver only when no OMAP2PLUS platform is selected. However, it seems entirely reasonable to include the driver in build tests on other platforms, so we should also allow building it for COMPILE_TEST builds and select the required GENERIC_IRQ_CHIP that may not already be enabled on other platforms. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 29 4月, 2014 4 次提交
-
-
由 Javier Martinez Canillas 提交于
Converts the GPIO OMAP driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Javier Martinez Canillas 提交于
The ARCH_OMAP config option was used to built the GPIO OMAP driver but this is not consistent with the rest of the GPIO drivers that have their own Kconfig option. Also, this make it harder to add dependencies or reverse dependencies (i.e: select) since that would mean touching the sub-arch config option. So is better to add a boolean Kconfig option for this driver that defaults to true if ARCH_OMAP is enabled. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Jean Delvare 提交于
GPIO_TIMBERDALE doesn't need an explicit dependency on HAS_IOMEM, because it depends on MFD_TIMBERDALE which itself depends on HAS_IOMEM already. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
Now that the gpiolib irqchip helpers can support nested, threaded IRQ handlers, switch the TC3589x driver over to using this new infrastructure. Tested on the Ux500. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 26 3月, 2014 1 次提交
-
-
由 Linus Walleij 提交于
This converts the PL061 driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-