1. 28 5月, 2014 1 次提交
    • P
      MIPS: smp-cps: rework core/VPE initialisation · 245a7868
      Paul Burton 提交于
      When hotplug and/or a powered down idle state are supported cases will
      arise where a non-zero VPE must be brought online without VPE 0, and it
      where multiple VPEs must be onlined simultaneously. This patch prepares
      for that by:
      
        - Splitting struct boot_config into core & VPE boot config structures,
          allocated one per core or VPE respectively. This allows for multiple
          VPEs to be onlined simultaneously without clobbering each others
          configuration.
      
        - Indicating which VPEs should be online within a core at any given
          time using a bitmap. This allows multiple VPEs to be brought online
          simultaneously and also indicates to VPE 0 whether it should halt
          after starting any non-zero VPEs that should be online within the
          core. For example if all VPEs within a core are offlined via hotplug
          and the user onlines the second VPE within that core:
      
            1) The core will be powered up.
      
            2) VPE 0 will run from the BEV (ie. mips_cps_core_entry) to
               initialise the core.
      
            3) VPE 0 will start VPE 1 because its bit is set in the cores
               bitmap.
      
            4) VPE 0 will halt itself because its bit is clear in the cores
               bitmap.
      
        - Moving the core & VPE initialisation to assembly code which does not
          make any use of the stack. This is because if a non-zero VPE is to
          be brought online in a powered down core then when VPE 0 of that
          core runs it may not have a valid stack, and even if it did then
          it's messy to run through parts of generic kernel code on VPE 0
          before starting the correct VPE.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      245a7868
  2. 02 5月, 2014 1 次提交
    • P
      MIPS: CPC: provide locking functions · 76ae6584
      Paul Burton 提交于
      This patch provides functions to lock & unlock access to the
      "core-other" register region of the CPC. Without performing appropriate
      locking it is possible for code using this region to be preempted or to
      race with code on another VPE within the same core, with one changing
      the core which the "core-other" region is acting upon at an inopportune
      time for the other.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      76ae6584
  3. 07 3月, 2014 1 次提交