1. 25 1月, 2012 1 次提交
    • M
      ARM: 7298/1: realview: fix mapping of MPCore private memory region · 34ae6c96
      Marc Zyngier 提交于
      Since commit 0536bdf3 (ARM: move iotable mappings within
      the vmalloc region), the RealView PB11MP cannot boot anymore.
      
      This is caused by the way the mappings are described on this
      platform (define replaced by hex values for clarity):
      
      {	/* GIC CPU interface mapping */
              .virtual        = IO_ADDRESS(0x1F000100),
              .pfn            = __phys_to_pfn(0x1F000100),
              .length         = SZ_4K,
              .type           = MT_DEVICE,
      }, {	/* GIC distributor mapping */
              .virtual        = IO_ADDRESS(0x1F001000),
              .pfn            = __phys_to_pfn(0x1F001000),
              .length         = SZ_4K,
              .type           = MT_DEVICE,
      }
      
      The first mapping ends up reserving two pages, and clashes with
      the second one, which triggers a BUG_ON in vm_area_add_early().
      
      In order to solve this problem, treat the MPCore private memory
      region (containing the SCU, the GIC and the TWD) as a single region,
      as described in the TRM:
      http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/CACGDJJC.html
      
      The EB11MP is converted the same way, even if it manages to avoid
      the problem.
      
      Tested on both PB11MP and EB11MP.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      34ae6c96
  2. 05 1月, 2012 2 次提交
  3. 27 11月, 2011 1 次提交
  4. 16 11月, 2011 1 次提交
  5. 17 10月, 2011 2 次提交
  6. 26 9月, 2011 1 次提交
  7. 12 8月, 2011 4 次提交
  8. 19 7月, 2011 1 次提交
  9. 23 5月, 2011 1 次提交
  10. 12 5月, 2011 3 次提交
  11. 18 2月, 2011 1 次提交
  12. 20 12月, 2010 1 次提交
  13. 15 12月, 2010 1 次提交
  14. 07 12月, 2010 1 次提交
  15. 03 12月, 2010 1 次提交
  16. 20 10月, 2010 1 次提交
  17. 05 10月, 2010 1 次提交
  18. 16 7月, 2010 1 次提交
  19. 15 7月, 2010 1 次提交
  20. 09 7月, 2010 1 次提交
    • L
      ARM: 6204/1: Fixups for the RealView PB1176 · 48f1d5a3
      Linus Walleij 提交于
      This is a number of basic fixes to the PB1176 that makes it tick
      properly:
      
      - Detect MMC insertion/removal even when PL061 GPIO is not compiled
        in. The register to read this status directly is removed on the
        PB1176.
      - Define the UART3 on the DevChip (where is actually is) and define
        the new UART4 serial port on the FPGA.
      - Also define the clocks for these two UARTs apropriately.
      - Remove the false notion that the PB1176 should have its CLCD
        on the ISSP, this is not the case, it is in the DevChip.
      - Remove the defintions and the previously commented-out PL081
        DMAC. As confirmed by mail this was found to be broken on the
        PB1176 board and removed from the subsequent FPGA images.
      Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      48f1d5a3
  21. 02 7月, 2010 1 次提交
  22. 02 5月, 2010 5 次提交
  23. 16 2月, 2010 1 次提交
  24. 13 2月, 2010 1 次提交
  25. 11 1月, 2010 1 次提交
  26. 05 11月, 2009 1 次提交
    • C
      RealView: Add sparsemem support for the RealView PBX platform · c97c5aa8
      Catalin Marinas 提交于
      The RealView PBX board has two 512MB blocks of memory - one at
      0x70000000 (with 256MB mirror at 0) and another at 0x20000000. Only the
      block at 0x70000000 (or the mirror at 0) may be used for DMA (e.g.
      framebuffer). This patch adds the sparsemem definitions to allow the use
      of all the memory split as follows:
      
        256MB @ 0x00000000 (ZONE_DMA)
        512MB @ 0x20000000 (ZONE_NORMAL)
        256MB @ 0x80000000 (ZONE_NORMAL)
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      c97c5aa8
  27. 01 11月, 2009 1 次提交
  28. 24 7月, 2009 1 次提交
  29. 07 7月, 2009 1 次提交