1. 16 9月, 2015 1 次提交
    • B
      PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code" · 237865f1
      Bjorn Helgaas 提交于
      Revert dff22d20 ("PCI: Call pci_read_bridge_bases() from core instead
      of arch code").
      
      Reading PCI bridge windows is not arch-specific in itself, but there is PCI
      core code that doesn't work correctly if we read them too early.  For
      example, Hannes found this case on an ARM Freescale i.mx6 board:
      
        pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
        pci 0000:00:00.0: PCI bridge to [bus 01-ff]
        pci 0000:00:00.0: BAR 8: no space for [mem size 0x01000000] (mem window)
        pci 0000:01:00.0: BAR 2: failed to assign [mem size 0x00200000]
        pci 0000:01:00.0: BAR 1: failed to assign [mem size 0x00004000]
        pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00000100]
      
      The 00:00.0 mem window needs to be at least 3MB: the 01:00.0 device needs
      0x204100 of space, and mem windows are megabyte-aligned.
      
      Bus sizing can increase a bridge window size, but never *decrease* it (see
      d65245c3 ("PCI: don't shrink bridge resources")).  Prior to
      dff22d20, ARM didn't read bridge windows at all, so the "original size"
      was zero, and we assigned a 3MB window.
      
      After dff22d20, we read the bridge windows before sizing the bus.  The
      firmware programmed a 16MB window (size 0x01000000) in 00:00.0, and since
      we never decrease the size, we kept 16MB even though we only needed 3MB.
      But 16MB doesn't fit in the host bridge aperture, so we failed to assign
      space for the window and the downstream devices.
      
      I think this is a defect in the PCI core: we shouldn't rely on the firmware
      to assign sensible windows.
      
      Ray reported a similar problem, also on ARM, with Broadcom iProc.
      
      Issues like this are too hard to fix right now, so revert dff22d20.
      Reported-by: NHannes <oe5hpm@gmail.com>
      Reported-by: NRay Jui <rjui@broadcom.com>
      Link: http://lkml.kernel.org/r/CAAa04yFQEUJm7Jj1qMT57-LG7ZGtnhNDBe=PpSRa70Mj+XhW-A@mail.gmail.com
      Link: http://lkml.kernel.org/r/55F75BB8.4070405@broadcom.comSigned-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      237865f1
  2. 08 9月, 2015 1 次提交
    • H
      PCI,parisc: Enable 64-bit bus addresses on PA-RISC · e02a653e
      Helge Deller 提交于
      Commit 3a9ad0b4 ("PCI: Add pci_bus_addr_t") unconditionally introduced usage of
      64-bit PCI bus addresses on all 64-bit platforms which broke PA-RISC.
      
      It turned out that due to enabling the 64-bit addresses, the PCI logic decided
      to use the GMMIO instead of the LMMIO region. This commit simply disables
      registering the GMMIO and thus we fall back to use the LMMIO region as before.
      
      Reverts commit 45ea2a5f
      ("PCI: Don't use 64-bit bus addresses on PA-RISC")
      
      To: linux-parisc@vger.kernel.org
      Cc: linux-pci@vger.kernel.org
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Meelis Roos <mroos@linux.ee>
      Cc: stable@vger.kernel.org  # v3.19+
      Signed-off-by: NHelge Deller <deller@gmx.de>
      e02a653e
  3. 23 7月, 2015 1 次提交
    • L
      PCI: Call pci_read_bridge_bases() from core instead of arch code · dff22d20
      Lorenzo Pieralisi 提交于
      When we scan a PCI bus, we read PCI-PCI bridge window registers with
      pci_read_bridge_bases() so we can validate the resource hierarchy.  Most
      architectures call pci_read_bridge_bases() from pcibios_fixup_bus(), but
      PCI-PCI bridges are not arch-specific, so this doesn't need to be in
      arch-specific code.
      
      Call pci_read_bridge_bases() directly from the PCI core instead of from
      arch code.
      
      For alpha and mips, we now call pci_read_bridge_bases() always; previously
      we only called it if PCI_PROBE_ONLY was set.
      
      [bhelgaas: changelog]
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: Ralf Baechle <ralf@linux-mips.org>
      CC: James E.J. Bottomley <jejb@parisc-linux.org>
      CC: Michael Ellerman <mpe@ellerman.id.au>
      CC: Bjorn Helgaas <bhelgaas@google.com>
      CC: Richard Henderson <rth@twiddle.net>
      CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      CC: David Howells <dhowells@redhat.com>
      CC: Russell King <linux@arm.linux.org.uk>
      CC: Tony Luck <tony.luck@intel.com>
      CC: David S. Miller <davem@davemloft.net>
      CC: Ingo Molnar <mingo@redhat.com>
      CC: Guenter Roeck <linux@roeck-us.net>
      CC: Michal Simek <monstr@monstr.eu>
      CC: Chris Zankel <chris@zankel.net>
      dff22d20
  4. 17 1月, 2015 1 次提交
  5. 26 7月, 2013 1 次提交
  6. 10 7月, 2013 1 次提交
  7. 01 6月, 2013 2 次提交
    • H
      parisc/PCI: lba: fix: convert to pci_create_root_bus() for correct root bus resources (v2) · b204a4d2
      Helge Deller 提交于
      commit dc7dce28
      Author: Bjorn Helgaas <bhelgaas@google.com>
      Date:   Fri Oct 28 16:27:27 2011 -0600
         parisc/PCI: lba: convert to pci_create_root_bus() for correct root bus
                          resources
      
        Supply root bus resources to pci_create_root_bus() so they're correct
        immediately.  This fixes the problem of "early" and "header" quirks seeing
        incorrect root bus resources.
      
      added tests for elmmio_space.start while it should use
      elmmio_space.flags.  This for example led to incorrect resource
      assignments and a non-working stifb framebuffer on most parisc machines.
      
      LBA 10:1: PCI host bridge to bus 0000:01
      pci_bus 0000:01: root bus resource [io  0x12000-0x13fff] (bus address [0x2000-0x3fff])
      pci_bus 0000:01: root bus resource [mem 0xfffffffffa000000-0xfffffffffbffffff] (bus address [0xfa000000-0xfbffffff])
      pci_bus 0000:01: root bus resource [mem 0xfffffffff4800000-0xfffffffff4ffffff] (bus address [0xf4800000-0xf4ffffff])
      pci_bus 0000:01: root bus resource [??? 0x00000001 flags 0x0]
      Signed-off-by: NHelge Deller <deller@gmx.de>
      Acked-by: NBjorn Helgaas <bhelgaas@google.com>
      b204a4d2
    • B
      parisc/PCI: Set type for LBA bus_num resource · b47d4934
      Bjorn Helgaas 提交于
      The non-PAT resource probing code failed to set the type of the LBA bus_num
      resource (30aa80da "parisc/PCI: register busn_res for root buses" did
      the corresponding thing for the PAT case).
      
      This causes incorrect resource assignments and a non-working stifb
      framebuffer on most parisc machines.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Signed-off-by: NHelge Deller <deller@gmx.de>
      b47d4934
  8. 04 1月, 2013 1 次提交
    • G
      Drivers: misc: remove __dev* attributes. · 0fe763c5
      Greg Kroah-Hartman 提交于
      CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
      markings need to be removed.
      
      This change removes the use of __devinit, __devexit_p, __devinitdata,
      __devinitconst, and __devexit from these drivers.
      
      Based on patches originally written by Bill Pemberton, but redone by me
      in order to handle some of the coding style issues better, by hand.
      
      Cc: Bill Pemberton <wfp5p@virginia.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      0fe763c5
  9. 23 8月, 2012 2 次提交
  10. 14 6月, 2012 2 次提交
  11. 29 3月, 2012 1 次提交
  12. 24 2月, 2012 1 次提交
  13. 07 1月, 2012 3 次提交
  14. 02 8月, 2009 1 次提交
  15. 03 7月, 2009 2 次提交
  16. 13 3月, 2009 1 次提交
  17. 06 1月, 2009 1 次提交
    • A
      parisc: drivers/parisc/: make code static · df8e5bc6
      Adrian Bunk 提交于
      Make the following needlessly global code static:
      
      - asp.c: asp_init_chip()
      - ccio-dma.c: ccio_io_pdir_entry()
      - dino.c: struct dino_port_ops
      - dino.c: struct dino_bios_ops
      - hppb.c: struct hppb_card_head
      - lasi.c: lasi_led_init()
      - lasi.c: lasi_init_chip()
      - lba_pci.c: struct lba_bios_ops
      - sba_iommu.c: sba_io_pdir_entry()
      - sba_iommu.c: sba_driver_callback()
      - sba_iommu.c: sba_driver_callback()
      - wax.c: wax_init_chip()
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Cc: Matthew Wilcox <matthew@wil.cx>
      Cc: Grant Grundler <grundler@parisc-linux.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NKyle McMartin <kyle@mcmartin.ca>
      df8e5bc6
  18. 15 5月, 2008 1 次提交
  19. 07 12月, 2007 1 次提交
  20. 19 10月, 2007 1 次提交
  21. 09 5月, 2007 1 次提交
  22. 17 2月, 2007 1 次提交
  23. 08 12月, 2006 2 次提交
  24. 04 10月, 2006 4 次提交
  25. 31 3月, 2006 1 次提交
  26. 23 1月, 2006 1 次提交
  27. 11 1月, 2006 2 次提交
  28. 22 10月, 2005 1 次提交
  29. 28 6月, 2005 1 次提交
    • R
      [PATCH] acpi bridge hotadd: ACPI based root bridge hot-add · c431ada4
      Rajesh Shah 提交于
      When you hot-plug a (root) bridge hierarchy, it may have p2p bridges and
      devices attached to it that have not been configured by firmware.  In this
      case, we need to configure the devices before starting them.  This patch
      separates device start from device scan so that we can introduce the
      configuration step in the middle.
      
      I kept the existing semantics for pci_scan_bus() since there are a huge number
      of callers to that function.
      
      Also, I have no way of testing the changes I made to the parisc files, so this
      needs review by those folks.  Sorry for the massive cross-post, this touches
      files in many different places.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      c431ada4