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  1. 17 12月, 2011 8 次提交
    • T
      ARM: OMAP3: pm: use prcm chain handler · 22f51371
      由 Tero Kristo 提交于 
      PM interrupt handling is now done through the PRCM chain handler. The
interrupt handling logic is also split in two parts, to serve IO and
WKUP events separately. This allows us to handle IO chain events in a
clean way.

Core event code is also changed in accordance to this, as PRCM
interrupt handling is done by independent handlers, and the core
handler should not clear the IO events anymore.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: use pr_err(); combined with portions of earlier patches and
 the "do not enable PRCM MPU interrupts manually" patch]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      22f51371
    • T
      ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad · abc2d545
      由 Tero Kristo 提交于 
      By default all registered pads will trigger mpu_irqs[0]. Now there is
an API for selecting used mpu_irq on pad basis, which can be used to
trigger different irq handlers for different pads in the same hwmod.
Each pad that requires its interrupt to be re-routed this way must
have a separate call to omap_hwmod_pad_route_irq(hwmod, pad, irq).
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: moved fn to omap_hwmod.c; separated fn from mux scan_wakeups
 changes; added kerneldoc]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      abc2d545
    • T
      ARM: OMAP2+: mux: add support for PAD wakeup interrupts · 13a3fe52
      由 Tero Kristo 提交于 
      OMAP mux now parses active wakeup events from pad registers and calls
corresponding hwmod ISRs once a wakeup is detected. This is
accomplished by registering an interrupt handler for PRCM IO event,
which is raised every time the HW detects wakeups.

[paul@pwsan.com: This patch is a merge of Govindraj R's "ARM: OMAP2+:
hwmod: Add API to check IO PAD wakeup status" patch, Tero Kristo's
"ARM: OMAP2+: mux: add support for PAD wakeup interrupts" patch, and
part of Tero's "ARM: OMAP: mux: add support for selecting mpu_irq for
each wakeup pad" patch.]
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
[paul@pwsan.com: reduced indentation level; renamed omap_hwmod function;
 improved function documentation; modified to iterate only through dynamic
 pads; modified to skip pads where idle mode doesn't enable wakeups; split
 patches]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      13a3fe52
    • T
      ARM: OMAP: PRCM: add suspend prepare / finish support · 91285b6f
      由 Tero Kristo 提交于 
      PRCM chain handler needs to disable forwarding of interrupts during
suspend, because runtime PM is disabled and most of the drivers
are potentially not able to handle interrupts coming at this time.

This patch masks all the PRCM interrupt events if a PRCM interrupt
occurs during suspend, but does not ack them. Once suspend finish
is called, all the masked events will be re-enabled, which causes
immediate PRCM interrupt and handles the postponed event.

The suspend prepare and complete  callbacks will be called from
pm34xx.c / pm44xx.c files in the following patches.

The functions defined in this patch should eventually be moved to
suspend->prepare and suspend->finish driver hooks, once the PRCM
chain handler will be made as its own driver.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: add kerneldoc, add omap_prcm_irq_setup.saved_mask, add fn
 ptrs for save_and_clear_irqen() and restore_irqen()]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      91285b6f
    • T
      ARM: OMAP: PRCM: add support for chain interrupt handler · 0a84a91c
      由 Tero Kristo 提交于 
      Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC being used.

PRCM interrupts have two priority levels, high or normal. High priority
is needed for IO event handling, so that we can be sure that IO events
are processed before other events. This reduces latency for IO event
customers and also prevents incorrect ack sequence on OMAP3.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Avinash.H.M <avinashhm@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: drop some dead code; use SoC-specific pending IRQ
 detection; move code to prm_common.c; add lots of documentation;
 remove saved_mask; add OCP barrier on ISR exit; improved error
 handling; split out per-SoC initialization to a separate patch]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      0a84a91c
    • P
      ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier · 26c98c56
      由 Paul Walmsley 提交于 
      Add PRM functions to test for pending PRM IRQs.  This will be used in
a subsequent patch to implement the PRM interrupt handler on the MPU.

Add PRM functions to ensure that all outstanding writes from the MPU
to the PRM IP block have completed before continuing execution.  This
will be used in a subsequent patch to ensure that all PRM interrupt
status bits are cleared in the hardware before exiting the ISR.
Normally we would not expose such a low-level function to other code.
But the current implementation of the PRM interrupt code, which uses
the generic IRQ chip code, doesn't give us a choice.

The pending PRM IRQ functions are based on code originally written by
Tero Kristo <t-kristo@ti.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
      26c98c56
    • G
      ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup · eceec009
      由 Govindraj R 提交于 
      Add API to enable IO pad wakeup capability based on mux pad and
wake_up enable flag available from hwmod_mux initialization.

Use the wakeup_enable flag and enable wakeup capability for the given
pads. Wakeup capability will be enabled/disabled during hwmod idle
transition based on whether wakeup_flag is set or cleared.  If the
hwmod is currently idled, and any mux values were changed by
_set_idle_ioring_wakeup(), the SCM PADCTRL registers will be updated.
Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
[paul@pwsan.com: rearranged code to limit indentation; cleaned up
 function documentation; removed unused non-static functions; modified
 to search all hwmod pads, not just dynamic remuxing ones; modified to
 update SCM regs if hwmod is currently idle and any pads have changed]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      eceec009
    • P
      ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list · 96dc19fd
      由 Paul Walmsley 提交于 
      omap_hwmod_mux() currently only iterates through the dynamic pad list.
This list currently only consists of pads with the
OMAP_DEVICE_MUX_REMUX flag set.

Subsequent patches in this series will cause hwmod mux entries with
the OMAP_DEVICE_MUX_WAKEUP flag set to be changed dynamically, to
control hwmod I/O ring wakeup.  For this to work correctly, hwmod mux
entries with the OMAP_DEVICE_MUX_WAKEUP flag set must also be added to
the dynamic pad list.  So this patch modifies omap_hwmod_mux_init() to
do so.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Govindraj R <govindraj.raja@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
      96dc19fd
  3. 01 12月, 2011 3 次提交
  5. 29 11月, 2011 2 次提交
  7. 27 11月, 2011 7 次提交
  9. 24 11月, 2011 10 次提交
  11. 23 11月, 2011 1 次提交
  13. 22 11月, 2011 4 次提交
  15. 21 11月, 2011 5 次提交