- 30 4月, 2016 1 次提交
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由 Dan Carpenter 提交于
We need to unlock before continuing. Also the continue was accidentally left out on one error path which would lead to a NULL dereference. Fixes: 86e3ef81 ('pinctrl: baytrail: Update gpio chip operations') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 4月, 2016 6 次提交
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由 Cristina Ciocan 提交于
Make debounce setting and getting functionality available when configurating a certain pin. Signed-off-by: NCristina Ciocan <cristina.ciocan@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Cristina Ciocan 提交于
This patch updates device's probing, removal and irq handling in order to register it as pinctrl device. Pin control data is matched by ACPI UID, since it is passed along as driver data in acpi_device_id structure. Signed-off-by: NCristina Ciocan <cristina.ciocan@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Cristina Ciocan 提交于
This patch updates the irq chip implementation in order to interact with the pin control chip model: the chip contains reference to SOC data and pin/group/community information is retrieved through the SOC reference. Signed-off-by: NCristina Ciocan <cristina.ciocan@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Cristina Ciocan 提交于
This patch updates the gpio chip implementation in order to interact with the pin control model: the chip contains reference to SOC data and pin/group/community information is retrieved through the SOC reference. Signed-off-by: NCristina Ciocan <cristina.ciocan@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Cristina Ciocan 提交于
Add implementation for: - pin control, group information retrieval: count, name and pins - pin muxing: - function information (count, name and groups) - mux setting - gpio control (enable, disable, set direction) - pin configuration: - pull disable - pull up/down and pull strength - debounce - any other option is treated as not supported. Signed-off-by: NCristina Ciocan <cristina.ciocan@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Cristina Ciocan 提交于
In order to implement pin control for Baytrail, we need data structures in which to store and pass along pin, group, function, community and SOC data information. Baytrail has 3 GPIO controllers. Add SCORE, NCORE and SUS controller data: - pins (for all controllers), - pad map for pins (for all controllers; we need this since pads are not ordered), - groups (for SCORE and SUS controllers), - functions (for SCORE and SUS controllers), - communities (for all controllers), - soc specific data gathering all of the above and the ACPI UID (for all controllers) This information is useful for pin control functionality. NCORE data is lighter than the other two controllers' due to lack of pin documentation in the public datasheet. Datasheet: http://www.intel.com/content/www/us/en/embedded/products/bay-trail/atom-e3800-family-datasheet.htmlSigned-off-by: NCristina Ciocan <cristina.ciocan@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 1月, 2016 1 次提交
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由 Linus Walleij 提交于
This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 12月, 2015 1 次提交
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由 Linus Walleij 提交于
As we want gpio_chip .get() calls to be able to return negative error codes and propagate to drivers, we need to go over all drivers and make sure their return values are clamped to [0,1]. We do this by using the ret = !!(val) design pattern. Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 11月, 2015 1 次提交
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由 Linus Walleij 提交于
The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: NLee Jones <lee.jones@linaro.org> Acked-by: NJiri Kosina <jkosina@suse.cz> Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: NJacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 10月, 2015 1 次提交
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由 Mika Westerberg 提交于
When CONFIG_PM is not set we get following compilation warnings: warning: ‘byt_gpio_runtime_suspend’ defined but not used [-Wunused-function] warning: ‘byt_gpio_runtime_resume’ defined but not used [-Wunused-function] Fix this by guarding byt_gpio_runtime_suspend()/byt_gpio_runtime_resume() with #ifdef CONFIG_PM. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 9月, 2015 1 次提交
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由 Thomas Gleixner 提交于
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
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- 26 8月, 2015 1 次提交
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由 Mika Westerberg 提交于
The Intel Baytrail pinctrl driver implements irqchip callbacks which are called with desc->lock raw_spinlock held. In mainline this is fine because spinlock resolves to raw_spinlock. However, running the same code in -rt we get: BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 in_atomic(): 1, irqs_disabled(): 1, pid: 0, name: swapper/0 Preemption disabled at:[<ffffffff81092e9f>] cpu_startup_entry+0x17f/0x480 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.1.5-rt5 #13 ... Call Trace: <IRQ> [<ffffffff816283c6>] dump_stack+0x4a/0x61 [<ffffffff81077e17>] ___might_sleep+0xe7/0x170 [<ffffffff8162d6cf>] rt_spin_lock+0x1f/0x50 [<ffffffff812e3b88>] byt_gpio_clear_triggering+0x38/0x60 [<ffffffff812e3bc1>] byt_irq_mask+0x11/0x20 [<ffffffff810a7013>] handle_level_irq+0x83/0x150 [<ffffffff810a3457>] generic_handle_irq+0x27/0x40 [<ffffffff812e3a5f>] byt_gpio_irq_handler+0x7f/0xc0 [<ffffffff810050aa>] handle_irq+0xaa/0x190 ... This is because in -rt spinlocks are preemptible so taking the driver private spinlock in irqchip callbacks causes might_sleep() to trigger. In order to keep -rt happy but at the same time make sure that register accesses get serialized, convert the driver to use raw_spinlock instead. Also shorten the critical section a bit in few places. Suggested-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 8月, 2015 2 次提交
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由 Mika Westerberg 提交于
There is a hardware issue in Intel Baytrail where concurrent GPIO register access might result reads of 0xffffffff and writes might get dropped completely. Prevent this from happening by taking the serializing lock in all places where it is possible that more than one thread might be accessing the hardware concurrently. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
The FSF address is already mentioned in the COPYING file. No need to duplicate that information to individual files. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 7月, 2015 1 次提交
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由 Thomas Gleixner 提交于
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Search and replacement was done with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Julia Lawall <julia.lawall@lip6.fr> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org
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- 06 3月, 2015 4 次提交
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由 Mika Westerberg 提交于
The BIOS might reconfigure pins as it needs when S3 is entered. This might cause drivers using the GPIOs to fail because the state was wrong or interrupts stopped working. Fix this by saving and restoring enough pin context over system sleep. Reported-by: NHans Holmberg <hans.holmberg@intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
Instead of handling everything in the driver's first level interrupt handler, we can take advantage of already existing flow handlers that are provided by the IRQ core. This changes the functionality a bit also. Previously the driver looped over pending interrupts in a single loop, restarting the loop if some interrupt changed state. This caused problem with Lenovo Thinkpad 10 digitizer that it was not able to deassert the interrupt before the driver disabled the interrupt for good (looplimit was exhausted). Rework the interrupt handling logic a bit so that we provide proper mask, ack and unmask operations in terms of Baytrail GPIO hardware and loop over pending interrupts only once. If the interrupt remains asserted the first level handler will be re-triggered automatically. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
If the pin is already configured as GPIO and it has any of the triggering flags set, we may get spurious interrupts depending on the state of the pin. Prevent this by clearing the triggering flags on such pins. However, if the pin is also configured as "direct IRQ" we leave the flags as is. Otherwise it will prevent interrupts that are routed directly to IO-APIC. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
Zotac ZBOX PI320, a Baytrail based mini-PC, has power button connected to a GPIO pin and it is exposed to the operating system as Windows 8 button array. This is implemented in Linux as a driver using gpio_keys. However, BIOS on this particula machine forgot to mux the pin to be a GPIO instead of native function, which results following message to be seen on the console: byt_gpio INT33FC:02: pin 16 cannot be used as GPIO. This causes power button to not work as the driver was not able to request the GPIO it needs. So instead of completely preventing this we allow turning the pin as GPIO but issue warning that something might be wrong. Reported-by: NBenjamin Adler <benadler@gmx.net> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 10月, 2014 1 次提交
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由 Mika Westerberg 提交于
We are going to have more pinctrl drivers for Intel hardware so separate all our pin controller drivers to own directory. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 10月, 2014 2 次提交
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由 Felipe Balbi 提交于
pinctrl-baytrail driver provides a proper ->remove() method on its platform_driver definition, however there's no way, currently, to unload the driver due to missing module_exit(). This patch adds module_exit(). Signed-off-by: NFelipe Balbi <balbi@ti.com> Acked-by: NDavid Cohen <david.a.cohen@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 David Cohen 提交于
Even if a gpio pin is set to output, we still need to set INPUT_EN functionality (by clearing INPUT_EN bit) to be able to read the pin's level. E.g. without this change, we'll always read low level state from sysfs. Cc: <stable@vger.kernel.org> # v3.14+ Cc: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: NDavid Cohen <david.a.cohen@linux.intel.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 20 10月, 2014 2 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Loic Poulain 提交于
Direct irq en bit should be cleared for pads using io mode. If not, the io based irq will never be detected. However, this bit can sometimes be misconfigured (BIOS issue). Force clearing of this bit in io mode and trigger a WARN. Signed-off-by: NLoic Poulain <loic.poulain@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 9月, 2014 1 次提交
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由 Mathias Nyman 提交于
Add the IRQCHIP_SKIP_SET_WAKE flag to baytrail gpio irq_chip to resolve unbalaced IRQ wake disable warnings. Suggested-by: NBorun Fu <borun.fu@intel.com> Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 7月, 2014 1 次提交
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由 Mika Westerberg 提交于
Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 7月, 2014 1 次提交
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由 abdoulaye berthe 提交于
Signed-off-by: Nabdoulaye berthe <berthe.ab@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 7月, 2014 1 次提交
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由 Eric Ernst 提交于
For Baytrail, you should never set a GPIO set to direct_irq to output mode. When direct_irq_en is set for a GPIO, it is tied directly to an APIC internally, and making the pad output does not make any sense. Assert a WARN() in the event this happens. Signed-off-by: NEric Ernst <eric.ernst@linux.intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 5月, 2014 3 次提交
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由 Mika Westerberg 提交于
In case of resolving power management or similar issues it might be useful to have these properties included in the debugfs output. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NMathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jin Yao 提交于
If chip->to_irq is NULL ACPI GPIO helpers don't register GPIO event handlers thus preventing any ACPI GPIO triggered events. Solve this by calling gpiochip_add() after we have set up drivers chip->to_irq hook. Signed-off-by: NJin Yao <yao.jin@intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jin Yao 提交于
Now that the x86 dynamic IRQ allocation problem has been resolved with commmit 62a08ae2 (genirq: x86: Ensure that dynamic irq allocation does not conflict), we can add back Baytrail-T ACPI ID to the pinctrl driver. This makes the driver to work on Asus T100 where it is needed for several things like ACPI GPIO events and SD card detection. References: https://bugzilla.kernel.org/show_bug.cgi?id=68291Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NJin Yao <yao.jin@intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 3月, 2014 1 次提交
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由 Linus Walleij 提交于
This switches all GPIO and pin control drivers with irqchips that were using .startup() and .shutdown() callbacks to lock GPIO lines for IRQ usage over to using the .request_resources() and .release_resources() callbacks just introduced into the irqchip vtable. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 3月, 2014 1 次提交
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由 Chew, Kean Ho 提交于
The requested gpio pin must has the func_pin_mux field set to GPIO function by BIOS/FW in advanced. Else, the gpio pin request would fail. This is to ensure that we do not expose any gpio pins which shall be used for alternate functions, for eg: wakeup pin, I/O interfaces for LPSS, etc. Signed-off-by: NChew, Kean Ho <kean.ho.chew@intel.com> Signed-off-by: NChew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: NDarren Hart <dvhart@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 1月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
This reverts commit f6308b36 (ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs), because it causes the Alan Cox' ASUS T100TA to "crash and burn" during boot if the Baytrail pinctrl driver is compiled in. Fixes: f6308b36 (ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs) Reported-by: NOne Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> Requested-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 08 1月, 2014 1 次提交
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由 Mika Westerberg 提交于
Instead of asking each driver to register to ACPI events we can just call acpi_gpiochip_register_interrupts() for each chip that has an ACPI handle. The function checks chip->to_irq and if it is set to NULL (a GPIO driver that doesn't do interrupts) the function does nothing. We also add the a new header drivers/gpio/gpiolib.h that is used for functions internal to gpiolib and add ACPI GPIO chip registering functions to that header. Once that is done we can remove call to acpi_gpiochip_register_interrupts() from its only user, pinctrl-baytrail.c Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 12月, 2013 1 次提交
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由 Linus Walleij 提交于
This uses the new API for tagging GPIO lines as in use by IRQs. This enforces a few semantic checks on how the underlying GPIO line is used. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mathias Nyman <mathias.nyman@linux.intel.com> Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 12月, 2013 1 次提交
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由 Linus Walleij 提交于
This switches the two members of struct gpio_chip that were defined as unsigned foo:1 to bool, because that is indeed what they are. Switch all users in the gpio and pinctrl subsystems to assign these values with true/false instead of 0/1. The users outside these subsystems will survive since true/false is 1/0, atleast we set some kind of more strict typing example. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 12月, 2013 1 次提交
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由 Mathias Nyman 提交于
The default gpiolib debug output shows pin labels. We want baytrail custom debug output to have the same functionality. Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 11月, 2013 1 次提交
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由 Paul Drews 提交于
This adds the new ACPI ID (INT33FC) for the BayTrail GPIO banks as seen on a BayTrail M System-On-Chip platform. This ACPI ID is used by the BayTrail GPIO (pinctrl) driver to manage the Low Power Subsystem (LPSS). Signed-off-by: NPaul Drews <paul.drews@intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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