- 02 4月, 2015 2 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
So let's remove everythig that only make sense for a kernel module and build the thing unconditionally. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 11月, 2014 2 次提交
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由 Andrew Bresticker 提交于
Now that the MIPS GIC irqchip lives in drivers/irqchip/, move its header over to include/linux/irqchip/. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8129/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andrew Bresticker 提交于
Now that the GIC properly uses IRQ domains, kill off the per-platform routing tables that were used to make the GIC appear transparent. This includes: - removing the mapping tables and the support for applying them, - moving GIC IPI support to the GIC driver, - properly routing the i8259 through the GIC on Malta, and - updating IRQ assignments on SEAD-3 when the GIC is present. Platforms no longer will pass an interrupt mapping table to gic_init. Instead, they will pass the CPU interrupt vector (2 - 7) that they expect the GIC to route interrupts to. Note that in EIC mode this value is ignored and all GIC interrupts are routed to EIC vector 1. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Acked-by: NJason Cooper <jason@lakedaemon.net> Reviewed-by: NQais Yousef <qais.yousef@imgtec.com> Tested-by: NQais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7816/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 14 9月, 2012 1 次提交
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由 Steven J. Hill 提交于
More information about the SEAD-3 platform can be found at <http://www.mips.com/products/development-kits/mips-sead-3/> on MTI's site. Currently, the M14K family of cores is what the SEAD-3 is utilised with. Signed-off-by: NDouglas Leung <douglas@mips.com> Signed-off-by: NChris Dearman <chris@mips.com> Signed-off-by: NSteven J. Hill <sjhill@mips.com>
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