1. 27 10月, 2014 10 次提交
  2. 03 10月, 2014 1 次提交
  3. 29 9月, 2014 1 次提交
    • T
      clk: ti: change clock init to use generic of_clk_init · c08ee14c
      Tero Kristo 提交于
      Previously, the TI clock driver initialized all the clocks hierarchically
      under each separate clock provider node. Now, each clock that requires
      IO access will instead check their parent node to find out which IO range
      to use.
      
      This patch allows the TI clock driver to use a few new features provided
      by the generic of_clk_init, and also allows registration of clock nodes
      outside the clock hierarchy (for example, any external clocks.)
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      Cc: Mike Turquette <mturquette@linaro.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
      Cc: Jyri Sarha <jsarha@ti.com>
      Cc: Stefan Assmann <sassmann@kpanic.de>
      Acked-by: NTony Lindgren <tony@atomide.com>
      c08ee14c
  4. 19 9月, 2014 5 次提交
  5. 18 9月, 2014 2 次提交
  6. 17 9月, 2014 5 次提交
    • E
      nand: omap2: Add support for flash-based bad block table · fef775ca
      Ezequiel García 提交于
      This commit adds a new platform-data boolean property that enables use
      of a flash-based bad block table. This can also be enabled by setting
      the 'nand-on-flash-bbt' devicetree property.
      
      If the flash BBT is not enabled, the driver falls back to use OOB
      bad block markers only, as before. If the flash BBT is enabled the
      kernel will keep track of bad blocks using a BBT, in addition to
      the OOB markers.
      
      As explained by Brian Norris the reasons for using a BBT are:
      
      ""
      The primary reason would be that NAND datasheets specify it these days.
      A better argument is that nobody guarantees that you can write a
      bad block marker to a worn out block; you may just get program failures.
      
      This has been acknowledged by several developers over the last several
      years.
      
      Additionally, you get a boot-time performance improvement if you only
      have to read a few pages, instead of a page or two from every block on
      the flash.
      ""
      Signed-off-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar>
      Acked-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      fef775ca
    • T
      ARM: OMAP3: Fix I/O chain clock line assertion timed out error · 7db143b8
      Tony Lindgren 提交于
      We are getting "PRM: I/O chain clock line assertion timed out" errors
      on early omaps for device tree based booting. This is because we are
      unconditionally calling reconfigure_io_chain while legacy booting
      has omap3_has_io_chain_ctrl() checks in place in omap_hwmod.c.
      
      For device tree based booting, we are calling reconfigure_io_chain
      unconditionally from pinctrl framework. So we need to add a check for
      omap3_has_io_chain_ctrl() to avoid the errors for trying to access
      a register that does not exist.
      
      For es3.0, the documentation in "4.11.2 Device Off-Mode Configuration"
      just mentions PM_WKEN_WKUP[8] bit. For es3.1, there's a new chapter in
      documentation for "4.11.2.2 I/O Wake-Up Mechanism" that describes the
      PM_WKEN_WKUP[16] ST_IO_CHAIN bit. So PM_WKEN_WKUP[16] bit did not get
      added until in es3.1 probaly to fix issues with flakey wake-up events.
      
      We are doing proper checks for ST_IO_CHAIN already in id.c and with
      omap3_has_io_chain_ctrl(). For more information, see also commit
      b02b9172 ("ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock
      control detection").
      
      Let's fix the issue by selecting the right function during init for
      reconfigure_io_chain depending on the omap revision. For es3.0 and
      earlier we need to just toggle EN_IO. By doing this, we can move the
      check for omap3_has_io_chain_ctrl() from omap_hwmod.c to the init code
      in prm_3xxx.c. And then we can unconditionally call reconfigure_io_chain.
      
      Thanks to Paul Walmsley and Nishanth Menon for help with debugging the
      issue.
      
      Fixes: 30a69ef7 ("ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap")
      Cc: Kevin Hilman <khilman@kernel.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Reviewed-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7db143b8
    • F
      arm: omap: irq: move irq.c to drivers/irqchip/ · 8598066c
      Felipe Balbi 提交于
      Just move the code over as it has no dependencies
      on arch/arm/ anymore.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      8598066c
    • F
      irqchip: add irq-omap-intc.h header · eaacabc0
      Felipe Balbi 提交于
      OMAP INTC irqchip driver will be moved under
      drivers/irqchip/ soon but we still have a dependency
      with mach-omap2 when it comes to idle functions.
      
      In order to make it easy to share those function
      prototypes with OMAP PM code, we introduce this new
      header.
      
      To avoid modifying several board-files and some of
      the PM-related code, we just include the new header
      from common.h which was already included by all
      users of IRQ-related PM code.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      eaacabc0
    • F
      arm: omap2: n8x0: move i2c devices to DT · e92ce89c
      Felipe Balbi 提交于
      By moving i2c devices to DT we can clean up
      i2c_board_info and fix a problem with moving
      INTC to irq domain where IRQs can be renumbered
      on each boot.
      
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e92ce89c
  7. 12 9月, 2014 16 次提交