This patch splits the sama5d3 SoCs definition:
- a common base for all sama5d3 SoCs (sama5d3.dtsi)
- several optional peripheral definitions which will be included by sama5d3
  specific SoCs (sama5d3_'periph name'.dtsi)
- sama5d3 specific SoC definitions (sama5d3x.dtsi)

This provides a better representation of the real hardware (drop unneed
dt nodes) and avoids peripheral id conflict (which is not the case for
current sama5d3 SoCs, but could be if other SoCs of this family are
released).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: add more "sama5d3?" compatibility strings]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch splits the sam9x5 peripheral definitions into:
- a common base for all sam9x5 SoCs (at91sam9x5.dtsi)
- several optional peripheral definitions which will be included by specific
  sam9x5 SoCs (at91sam9x5_'periph name'.dtsi)

This provides a better representation of the real hardware (drop unneeded
dt nodes) and avoids future peripheral id conflict (lcdc and isi both use
peripheral id 25).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Revision 0 of Exynos4210 SoC (used on Universal C210 board) requires
'secure' PL330 MDMA1 address (0x12840000) instead of 'non-secure' one
(0x12850000). Fix it by overriding the default PL330 MDMA1 address in
exynos4210-universal_c210.dts.

This is a Device Tree (DT) version of commit 91280e75 ("ARM: EXYNOS:
PL330 MDMA1 fix for revision 0 of Exynos4210 SOC") and fixes recent
regression caused by conversion to DT-only setup on ARM EXYNOS.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos cpufreq drivers does not support device tree based regulator
lookup, so it can get the VDD ARM regulator only by its name. To get
cpufreq working for now, this patch works this around by renaming the
regulator in board dts files to vdd_arm, which is the name expected by
the driver.

This fixes a regression introduced by dropping support of board file
based bootup of Exynos 4210 boards that rendered cpufreq inoperable on
Trats and Origen boards.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch removes '_' from "early_prink" on Exynos5440 dts
files in according to kernel-parameters document.
Signed-off-by: NYoungmin Nam <youngmin.nam@samsung.com>
Reviewed-by: NSachin Kamat <sachin.kamat@linaro.org>
Tested-by: NJungseok Lee <jays.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Corrects an obvious typo in the Arndale pinctrl descriptions in DT.
The samsung-pinctrl driver uses the correct name.
Signed-off-by: NAl Stone <al.stone@linaro.org>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

These were used only in one intermediate variant of the pinctrl
driver but forgotten in the dtsi file. rockchip,config properties are
neither part of the actual binding nor handled by the pinctrl driver
at all, so remove them.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

This fixes a long-standing Integrator/CP regression from
commit 870e2928
"ARM: integrator-cp: convert use CLKSRC_OF for timer init"

When this code was introduced, the both aliases pointing the
system to use timer1 as primary (clocksource) and timer2
as secondary (clockevent) was ignored, and the system would
simply use the first two timers found as clocksource and
clockevent.

However this made the system timeline accelerate by a
factor x25, as it turns out that the way the clocking
actually works (totally undocumented and found after some
trial-and-error) is that timer0 runs @ 25MHz and timer1
and timer2 runs @ 1MHz. Presumably this divider setting
is a boot-on default and configurable albeit the way to
configure it is not documented.

So as a quick fix to the problem, let's mark timer0 as
disabled, so the code will chose timer1 and timer2 as it
used to.

This also deletes the two aliases for the primary and
secondary timer as they have been superceded by the
auto-selection

Cc: stable@vger.kernel.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Without the "clock-frequency" property in arch timer node, could able
to see the below crash dump.

[<c0014e28>] (unwind_backtrace+0x0/0xf4) from [<c0011808>] (show_stack+0x10/0x14)
[<c0011808>] (show_stack+0x10/0x14) from [<c036ac1c>] (dump_stack+0x7c/0xb0)
[<c036ac1c>] (dump_stack+0x7c/0xb0) from [<c01ab760>] (Ldiv0_64+0x8/0x18)
[<c01ab760>] (Ldiv0_64+0x8/0x18) from [<c0062f60>] (clockevents_config.part.2+0x1c/0x74)
[<c0062f60>] (clockevents_config.part.2+0x1c/0x74) from [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c)
[<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) from [<c02b8e8c>] (arch_timer_setup+0xa8/0x134)
[<c02b8e8c>] (arch_timer_setup+0xa8/0x134) from [<c04b47b4>] (arch_timer_init+0x1f4/0x24c)
[<c04b47b4>] (arch_timer_init+0x1f4/0x24c) from [<c04b40d8>] (clocksource_of_init+0x34/0x58)
[<c04b40d8>] (clocksource_of_init+0x34/0x58) from [<c049ed8c>] (time_init+0x20/0x2c)
[<c049ed8c>] (time_init+0x20/0x2c) from [<c049b95c>] (start_kernel+0x1e0/0x39c)

THis is because the Exynos u-boot, for example on the Chromebooks, doesn't set
up the CNTFRQ register as expected by arch_timer. Instead, we have to specify
the frequency in the device tree like this.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
[olof: Changed subject, added comment, elaborated on commit message]
Signed-off-by: NOlof Johansson <olof@lixom.net>

The wake-up interrupt bit is available on omap3/4/5 processors
unlike what we claim. Without fixing it we cannot use it on
omap3 and the system configured for wake-up events will just
hang on wake-up.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: NTony Lindgren <tony@atomide.com>

SoC family definitions at the moment are reactive to board needs
as a result, beagle-xm would matchup with ti,omap3 which invokes
omap3430_init_early instead of omap3630_init_early. Obviously, this is
the wrong behavior.

With clock node dts conversion, we get the following warnings before
system hangs as a result and 3630 based platforms fails to boot
(uart4 clocks are only present in OMAP3630 and not present in
OMAP3430):

...
omap_hwmod: uart4: cannot clk_get main_clk uart4_fck
omap_hwmod: uart4: cannot _init_clocks

WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434
_init+0x6c/0x80()
omap_hwmod: uart4: couldn't init clocks
...

WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
_enable+0x254/0x280()
omap_hwmod: timer12: enabled state can only be entered from
initialized, idle, or disabled state
...

WARNING: CPU: 0 PID: 46 at arch/arm/mach-omap2/omap_hwmod.c:2224
_idle+0xd4/0xf8()
omap_hwmod: timer12: idle state can only be entered from enabled state

WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
_enable+0x254/0x280()
omap_hwmod: uart4: enabled state can only be entered from
initialized, idle, or disabled state

So, add specific compatiblity for 3630 to allow match for Beagle-XM
platform.
Signed-off-by: NNishanth Menon <nm@ti.com>
[tony@atomide.com: left out ti,omap343x, updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Split USB2 PHY and USB3 PHY into separate omap-control-usb
nodes. Get rid of "ti,type" property.

CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Split otghs_ctrl and USB2 PHY power-down into separate
omap-control-usb nodes. Get rid of "ti,type" property.

Also get rid of "ti,has-mailbox" property from usb_otg_hs
node and provide the ctrl-module phandle.

CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This is an RFC for the new touchscreen properties.
Signed-off-by: NJuergen Beisert <jbe@pengutronix.de>
Tested-by: NMarek Vasut <marex@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>
Tested-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>
CC: linux-arm-kernel@lists.infradead.org
CC: linux-input@vger.kernel.org
CC: devel@driverdev.osuosl.org
CC: Marek Vasut <marex@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: devicetree@vger.kernel.org

The delay units inside the LRADC depend on the presence of a 2 kHz clock.
This change enables the clock to be able to use the delay unit for the
touchscreen part of the driver.
Signed-off-by: NJuergen Beisert <jbe@pengutronix.de>
Tested-by: NMarek Vasut <marex@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>
Tested-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>

When 5e12a613 and 0cd3754a were introduced, Netgear ReadyNAS 102 .dts
file was queued for inclusion and missed the update to have Mbus (and
then BootROM) ranges properties declared. It also missed the relocation
of Armada 370/XP PCIe DT nodes introduced by 14fd8ed0 after de1af8d4.
This patch fixes that which makes 3.12-rc3 bootable on the NAS.
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

the current dts is lacking interrupt and dma prop for video input
processor of prima2 and atlas6, this patch fixes it.
Signed-off-by: NRenwei Wu <Renwei.Wu@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

we lost an address range <0x56000000 0x56000000 0x1b00000> for peri-iobg
of prima2.
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Makefile missed to include atlas6-evb.dtb for ARCH_ATLAS6.
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

sirf uart and usp-based uart driver with full dma support has
hit 3.12, here we fix the fifosize, dma channels for some HW
prop.
Signed-off-by: NQipan Li <Qipan.Li@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Without that fix, at the end of the shutdown process, the board is
still powered (led glowing, fan running, ...).
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

NETGEAR ReadyNAS 102 Power button definition in .dts file flags
associated GPIO active low instead of active high. This results
in reversed events reported by input subsystem (0 returned when
the button is pressed, 1 when released). This patch makes
associated GPIO active high to recover correct behaviour.
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Updated the usb_otg_hs dt data to include the *phy* and *phy-names*
binding in order for the driver to use the new generic PHY framework.
Also updated the Documentation to include the binding information.
The PHY binding information can be found at
Documentation/devicetree/bindings/phy/phy-bindings.txt
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Use a standard 'qcom' prefix to denotate device trees meant for Qualcomm
based processors.
Signed-off-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

We now have device tree support for setting the NAND timings
for FSMC from the device tree, so delete the last piece of
platform data and auxdata.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds the STw481x VMMC regulator to the Nomadik
device tree.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This property is no longer required by the GPIO binding. Remove it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Currently DT compatibility strings of both types can be found in the kernel
sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be
followed and the former one is preferred. This patch converts the SDHI
MMC driver and its users to the common standard. This is safe for now, since
ATM no real products are using this driver with DT.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: NChris Ball <cjb@laptop.org>
[Removed r8a7740.dtsi portion as it is not applicable]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

There appears to be an error in the second address of the second XOR
engine in the Kirkwood SoC device tree, which is specified as 0xd0b00
but should be 0x60b00.

For confirmation of address see table 581 page 658 of:

http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf

Also see definition of XOR1_HIGH_PHYS_BASE in
arch/arm/mach-kirkwood/include/mach/kirkwood.h
Signed-off-by: NQuentin Armitage <quentin@armitage.org.uk>
Reviewed-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Reported-by: NJiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Replace pinctrl_usart2_rts and pinctrl_usart2_cts istead of pinctrl_uart2_*.
Signed-off-by: NJiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

With the addition of the Armada XP reference clock, we can now model
accurately the available clock inputs for the timer: namely, nbclk
and refclk. For each of this clock inputs we assign a name, for the
driver to select as appropriate.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: NMike Turquette <mturquette@linaro.org>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The Armada XP SoC has a reference 25 MHz fixed-clock that is used in
some controllers such as the timer and the watchdog. This commit adds
a DT representation of this clock through a fixed-clock compatible node.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: NMike Turquette <mturquette@linaro.org>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The kirkwood.dtsi cpu@0 node is missing the mandatory reg property.
This causes of_get_cpu_node() to fail to find the node and as a result
the cpufreq driver fails in its probe function.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Add pinmux configuration for MCBSP2 connected to the TDM interface.
With this configuration the Headset modules works as expected.
Signed-off-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Commit 76787b3b (ARM: OMAP2+: Remove board-4430sdp.c)
removed legacy booting in favor of device tree based booting
for 4430sdp. That caused the WLAN to stop working as the
related .dts entries fell through the cracks.

I don't have the "1283 PG 2.21 connectivity device" on my 4430sdp,
but the earlier version of this patch was tested by Luciano
Coelho. This version has left out the input logic for MMC CLK
line compared to the earlier version as that is not bidirectional,
and should be safe to do.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Luciano Coelho <luca@coelho.fi>
Cc: Ruslan Bilovol <ruslan.bilovol@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Commit b42b9181 (ARM: OMAP2+: Remove board-omap4panda.c)
removed legacy booting in favor of device tree based booting
for pandaboard. That caused the WLAN to stop working as the
related .dts entries fell through the cracks.

The legacy muxing was setting pulls for GPIO 48 and 49, so let's
keep that behaviour for now to avoid further regressions for
BT and FM. Also input logic was enabled for MMC CLK line, but
I've verified that the input logic we don't need enabled for
CLK line as it's not bidirectional.

Also, we want to use non-removable instead of ti,non-removable
as the ti,non-removable also sets no_regulator_off_init which
is really not what we want as then wl12xx won't get powered
up and down which is needed for resetting it.

Note that looks like the WLAN interface fails to come up after
a warm reset, but that most likely was also happening with
the legacy booting and needs a separate fix.

Cc: Paolo Pisati <p.pisati@gmail.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Luciano Coelho <luca@coelho.fi>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Fix the DTS data for ocp2scp node by adding the
missing reg property.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

USB3 block has a 64KiB space, another 64KiB is
used for the wrapper.

Without this change, resource_size() will get
confused and driver won't probe because size
will be negative.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

The BeagleBone Black is basically a regular BeagleBone with eMMC and
HDMI added, so create a common dtsi both can use.

IMPORTANT: booting the existing am335x-bone.dts will blow up the HDMI
transceiver after a dozen boots with an uSD card inserted because LDO
will be at 3.3V instead of 1.8.

MMC support for AM335x still isn't in, so only the LDO change has been
added.
Signed-off-by: NKoen Kooi <koen@dominion.thruhere.net>
Tested-by: NTom Rini <trini@ti.com>
Tested-by: NMatt Porter <matt.porter@linaro.org>
Acked-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NJoel Fernandes <joelf@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>