1. 30 1月, 2008 1 次提交
    • G
      kobj: fix threshold_init_device/kobject_uevent_env oops · 213eca7f
      Greg KH 提交于
      the logic in this function is just crazy.  It's recursive, but we
      can circumvent the creation for the kobject and whole creation of the
      threshold_block if some conditions are met.  That's why we see the
      allocate_threshold_blocks so many times in the callstack, yet only a few
      kobjects created.
      
      Then we blow up in kobject_uevent_env() on the first debug printk.
      Which means that we are just passing in garbage.
      
      Man, this is one time that comments in code would have been very nice to
      have, and why forward goto's into major code blocks are just evil...
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      213eca7f
  2. 25 1月, 2008 3 次提交
  3. 24 10月, 2007 1 次提交
  4. 20 10月, 2007 1 次提交
    • M
      x86: convert cpuinfo_x86 array to a per_cpu array · 92cb7612
      Mike Travis 提交于
      cpu_data is currently an array defined using NR_CPUS.  This means that
      we overallocate since we will rarely really use maximum configured cpus.
      When NR_CPU count is raised to 4096 the size of cpu_data becomes
      3,145,728 bytes.
      
      These changes were adopted from the sparc64 (and ia64) code.  An
      additional field was added to cpuinfo_x86 to be a non-ambiguous cpu
      index.  This corresponds to the index into a cpumask_t as well as the
      per_cpu index.  It's used in various places like show_cpuinfo().
      
      cpu_data is defined to be the boot_cpu_data structure for the NON-SMP
      case.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Acked-by: NChristoph Lameter <clameter@sgi.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: James Bottomley <James.Bottomley@steeleye.com>
      Cc: Dmitry Torokhov <dtor@mail.ru>
      Cc: "Antonino A. Daplas" <adaplas@pol.net>
      Cc: Mark M. Hoffman <mhoffman@lightlink.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      92cb7612
  5. 18 10月, 2007 1 次提交
    • J
      x86: expand /proc/interrupts to include missing vectors, v2 · 38e760a1
      Joe Korty 提交于
      Add missing IRQs and IRQ descriptions to /proc/interrupts.
      
      /proc/interrupts is most useful when it displays every IRQ vector in use by
      the system, not just those somebody thought would be interesting.
      
      This patch inserts the following vector displays to the i386 and x86_64
      platforms, as appropriate:
      
      	rescheduling interrupts
      	TLB flush interrupts
      	function call interrupts
      	thermal event interrupts
      	threshold interrupts
      	spurious interrupts
      
      A threshold interrupt occurs when ECC memory correction is occuring at too
      high a frequency.  Thresholds are used by the ECC hardware as occasional
      ECC failures are part of normal operation, but long sequences of ECC
      failures usually indicate a memory chip that is about to fail.
      
      Thermal event interrupts occur when a temperature threshold has been
      exceeded for some CPU chip.  IIRC, a thermal interrupt is also generated
      when the temperature drops back to a normal level.
      
      A spurious interrupt is an interrupt that was raised then lowered by the
      device before it could be fully processed by the APIC.  Hence the apic sees
      the interrupt but does not know what device it came from.  For this case
      the APIC hardware will assume a vector of 0xff.
      
      Rescheduling, call, and TLB flush interrupts are sent from one CPU to
      another per the needs of the OS.  Typically, their statistics would be used
      to discover if an interrupt flood of the given type has been occuring.
      
      AK: merged v2 and v4 which had some more tweaks
      AK: replace Local interrupts with Local timer interrupts
      AK: Fixed description of interrupt types.
      
      [ tglx: arch/x86 adaptation ]
      [ mingo: small cleanup ]
      Signed-off-by: NJoe Korty <joe.korty@ccur.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Cc: Tim Hockin <thockin@hockin.org>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      38e760a1
  6. 17 10月, 2007 1 次提交
    • M
      x86: Convert cpu_core_map to be a per cpu variable · 08357611
      Mike Travis 提交于
      This is from an earlier message from 'Christoph Lameter':
      
          cpu_core_map is currently an array defined using NR_CPUS. This means that
          we overallocate since we will rarely really use maximum configured cpu.
      
          If we put the cpu_core_map into the per cpu area then it will be allocated
          for each processor as it comes online.
      
          This means that the core map cannot be accessed until the per cpu area
          has been allocated. Xen does a weird thing here looping over all processors
          and zeroing the masks that are not yet allocated and that will be zeroed
          when they are allocated. I commented the code out.
      Signed-off-by: NChristoph Lameter <clameter@sgi.com>
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      08357611
  7. 11 10月, 2007 2 次提交
  8. 22 7月, 2007 1 次提交
  9. 10 5月, 2007 1 次提交
    • R
      Add suspend-related notifications for CPU hotplug · 8bb78442
      Rafael J. Wysocki 提交于
      Since nonboot CPUs are now disabled after tasks and devices have been
      frozen and the CPU hotplug infrastructure is used for this purpose, we need
      special CPU hotplug notifications that will help the CPU-hotplug-aware
      subsystems distinguish normal CPU hotplug events from CPU hotplug events
      related to a system-wide suspend or resume operation in progress.  This
      patch introduces such notifications and causes them to be used during
      suspend and resume transitions.  It also changes all of the
      CPU-hotplug-aware subsystems to take these notifications into consideration
      (for now they are handled in the same way as the corresponding "normal"
      ones).
      
      [oleg@tv-sign.ru: cleanups]
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Cc: Gautham R Shenoy <ego@in.ibm.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Signed-off-by: NOleg Nesterov <oleg@tv-sign.ru>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      8bb78442
  10. 13 2月, 2007 2 次提交
    • A
      [PATCH] x86-64: Allow to run a program when a machine check event is detected · a98f0dd3
      Andi Kleen 提交于
      When a machine check event is detected (including a AMD RevF threshold
      overflow event) allow to run a "trigger" program. This allows user space
      to react to such events sooner.
      
      The trigger is configured using a new trigger entry in the
      machinecheck sysfs interface. It is currently shared between
      all CPUs.
      
      I also fixed the AMD threshold handler to run the machine
      check polling code immediately to actually log any events
      that might have caused the threshold interrupt.
      
      Also added some documentation for the mce sysfs interface.
      Signed-off-by: NAndi Kleen <ak@suse.de>
      a98f0dd3
    • J
      [PATCH] x86-64: Tighten mce_amd driver MSR reads · 24ce0e96
      Jan Beulich 提交于
      while debugging an unrelated problem in Xen, I noticed odd reads from
      non-existent MSRs. Having now found time to look why these happen, I
      came up with below patch, which
      - prevents accessing MCi_MISCj with j > 0 when the block pointer in
      MCi_MISC0 is zero
      - accesses only contiguous MCi_MISCj until a non-implemented one is
      found
      - doesn't touch unimplemented blocks in mce_threshold_interrupt at all
      - gives names to two bits previously derived from MASK_VALID_HI (it
      took me some time to understand the code without this)
      
      The first three items, besides being apparently closer to the spec, should
      namely help cutting down on the time mce_threshold_interrupt() takes.
      Signed-off-by: NAndi Kleen <ak@suse.de>
      24ce0e96
  11. 12 2月, 2007 1 次提交
  12. 08 12月, 2006 1 次提交
  13. 01 8月, 2006 1 次提交
  14. 11 7月, 2006 1 次提交
  15. 27 6月, 2006 5 次提交
  16. 26 4月, 2006 1 次提交
  17. 12 1月, 2006 2 次提交
    • L
      [PATCH] x86_64: Sparse warnings fix. · 68209407
      Luiz Fernando Capitulino 提交于
       Fixes the following sparse warnings:
      
      arch/x86_64/kernel/mce_amd.c:321:29: warning: Using plain integer as NULL pointer
      arch/x86_64/kernel/mce_amd.c:410:41: warning: Using plain integer as NULL pointer
      Signed-off-by: NLuiz Capitulino <lcapitulino@mandriva.com.br>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      68209407
    • A
      [PATCH] x86_64: Add idle notifiers · 95833c83
      Andi Kleen 提交于
      This adds a new notifier chain that is called with IDLE_START
      when a CPU goes idle and IDLE_END when it goes out of idle.
      The context can be idle thread or interrupt context.
      
      Since we cannot rely on MONITOR/MWAIT existing the idle
      end check currently has to be done in all interrupt
      handlers.
      
      They were originally inspired by the similar s390 implementation.
      
      They have a variety of applications:
      - They will be needed for CONFIG_NO_IDLE_HZ
      - They can be used for oprofile to fix up the missing time
      in idle when performance counters don't tick.
      - They can be used for better C state management in ACPI
      - They could be used for microstate accounting.
      
      This is just infrastructure so far, no users.
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      95833c83
  18. 15 11月, 2005 1 次提交
    • J
      [PATCH] x86_64: Support for AMD specific MCE Threshold. · 89b831ef
      Jacob Shin 提交于
      MC4_MISC - DRAM Errors Threshold Register realized under AMD K8 Rev F.
      This register is used to count correctable and uncorrectable ECC errors that occur during DRAM read operations.
      The user may interface through sysfs files in order to change the threshold configuration.
      
      bank%d/error_count - reads current error count, write to clear.
      bank%d/interrupt_enable - set/clear interrupt enable.
      bank%d/threshold_limit - read/write the threshold limit.
      
      APIC vector 0xF9 in hw_irq.h.
      5 software defined bank ids in mce.h.
      new apic.c function to setup threshold apic lvt.
      defaults to interrupt off, count enabled, and threshold limit max.
      sysfs interface created on /sys/devices/system/threshold.
      
      AK: added some ifdefs to make it compile on UP
      Signed-off-by: NJacob Shin <jacob.shin@amd.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      89b831ef