- 13 4月, 2013 1 次提交
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由 Emilio López 提交于
This commit uses the new fixed-rate support on the composite clock to unify osc24M_fixed and osc24M clocks, so it matches the actual hardware. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMike Turquette <mturquette@linaro.org> [mturquette@linaro.org: replace clk_register_gatable_osc with a call to clk_register_composite]
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- 05 4月, 2013 3 次提交
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由 Emilio López 提交于
clk_register will copy this information, so we can just use a normal array and do one less dynamic allocation. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Emilio López 提交于
This flag was in place to prevent important clocks from getting gated while they had no users. Now that the UART driver supports clocks properly, we can drop this. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Emilio López 提交于
This patchset adds DT support for all the AXI, AHB, APB0 and APB1 gates present on sunxi SoCs. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 27 3月, 2013 2 次提交
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由 Emilio López 提交于
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that look pretty much the same; but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Emilio López 提交于
This commit implements the base CPU clocks for sunxi devices. It has been tested using a slightly modified cpufreq driver from the linux-sunxi 3.0 tree. Additionally, document the new bindings introduced by this patch. Idling: / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 60000000 cpu 0 0 60000000 axi 0 0 60000000 ahb 0 0 60000000 apb0 0 0 30000000 dummy 0 0 0 After "yes >/dev/null &": / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 1008000000 cpu 0 0 1008000000 axi 0 0 336000000 ahb 0 0 168000000 apb0 0 0 84000000 dummy 0 0 0 Signed-off-by: NEmilio López <emilio@elopez.com.ar> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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