The sdmmc clocks on Tegra114 and Tegra124 are 3-bit wide muxes with
6 parents.  Add support for tegra_clk_sdmmc*_8 and switch Tegra114
and Tegra124 to use these clocks instead.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>

UARTE has clock number 66. Number 65 is the right one for UARTD.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Tegra124 introduces a number of new peripheral clocks. This patch adds those
to the common peripheral clock code.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>

Tegra124 has a clock which consists of a mux and a fractional divider.
Add support for this.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Tegra124 has periph clocks which share the hw register. Hence locking is
required.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Introduce a new file for peripheral clocks common between several Tegra
SoCs and move Tegra114 to this new infrastructure. Also PLLP and the PLLP_OUT
clocks will be initialized here.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>