1. 20 4月, 2013 9 次提交
    • A
      irqchip: exynos: look up irq using irq_find_mapping · 20adee8f
      Arnd Bergmann 提交于
      Since we want to move to using the linear IRQ domain in the
      future, we cannot rely on the irq numbers to be contiguous
      and need to look up the irq from the hwirq using the domain.
      
      This also turns the bogus comparison with NR_IRQ into a
      more meaningful check to see if the number has a valid mapping.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      20adee8f
    • A
      irqchip: exynos: pass irq_base from platform · 863a08dc
      Arnd Bergmann 提交于
      The platform code knows the IRQ base, while the irqchip driver
      should really not. This is a littly hacky because we still
      hardwire the IRQ base to 160 for the combiner in the DT case,
      when we should really use -1. Removing that line will cause
      a linear IRQ domain to be use, as we should.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      863a08dc
    • A
      irqchip: exynos: localize irq lookup for ATAGS · 92c8e496
      Arnd Bergmann 提交于
      The IRQ_SPI() macro is not available in the driver when building with sparse
      IRQs or multiplatform, so let's move all users of this into one function
      that we can leave out when building DT-only.
      Signed-off-by: NArnd Bergmann <arnd@arnd.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      92c8e496
    • A
      irqchip: exynos: allocate combiner_data dynamically · d34f03d4
      Arnd Bergmann 提交于
      The number of combiners on a given SoC is a platform specific
      constant, and we cannot encode this number on a multiplatform
      kernel since the header file defining it is not available.
      
      Allocating the structure dynamically ends up cleaner anyway
      since we keep all the data local.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      d34f03d4
    • A
      irqchip: exynos: pass max combiner number to combiner_init · 6761dcfe
      Arnd Bergmann 提交于
      We can find out the number of combined IRQs from the device
      tree, but in case of ATAGS boot, the driver currently uses
      hardcoded values based on the SoC type. We can't do that
      in general for a multiplatform kernel, so let's instead pass
      this information from platform code directly in case of
      ATAGS boot.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      6761dcfe
    • A
      ARM: exynos: add missing properties for combiner IRQs · 30269ddf
      Arnd Bergmann 提交于
      The exynos combiner irqchip needs to find the parent interrupts
      and needs to know their number, so add the missing properties
      for exynos4 as they were already present for exynos5.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      30269ddf
    • A
      clocksource: exynos_mct: remove platform header dependency · 034c097c
      Arnd Bergmann 提交于
      For the non-DT case, the mct_init() function requires access
      to a couple of platform specific constants, but cannot include
      the header files in case we are building for multiplatform.
      
      This changes the interface to the platform so we pass all
      the necessary data as arguments to mct_init.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: John Stultz <john.stultz@linaro.org>
      034c097c
    • A
      clk: exynos: prepare for multiplatform · 25e56eba
      Arnd Bergmann 提交于
      The new common clock drivers for exynos are using compile
      time constants and soc_is_exynos* macros to provide backwards
      compatibility for pre-DT systems, which is not possible with
      multiplatform kernels. This moves all the necessary
      information back into platform code and removes the mach/*
      header inclusions.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Mike Turquette <mturquette@linaro.org>
      25e56eba
    • A
      clocksource: exynos_mct: fix build error on non-DT · f4636d0a
      Arnd Bergmann 提交于
      There is currently no alternative implementation for of_irq_count
      when the function is not defined, and the declaration is hidden,
      so this works around calling an undeclared function. It should
      really not be needed.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      f4636d0a
  2. 19 4月, 2013 11 次提交
  3. 13 4月, 2013 2 次提交
  4. 12 4月, 2013 3 次提交
  5. 10 4月, 2013 5 次提交
  6. 09 4月, 2013 10 次提交
    • A
      Merge tag 'ux500-pinctrl' of... · ab9838e1
      Arnd Bergmann 提交于
      Merge tag 'ux500-pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers
      
      From Linus Walleij <linus.walleij@linaro.org>:
      
      ux500 pinctrl updates for the ARM SoC tree.
      
      * tag 'ux500-pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
        ARM: ux500: 8500: add ab8500-musb pinctrl support
        ARM: ux500: remove redundant DB8500_PIN_SLEEP definition
        ARM: ux500: Add Snowball pin configuration for user LED
        ARM: ux500: u8500: fix pinctrl IDLE state definition for SPI2
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      ab9838e1
    • A
      Merge tag 'tegra-for-3.10-clk' of... · 2b079101
      Arnd Bergmann 提交于
      Merge tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/drivers
      
      From Stephen Warren <swarren@wwwdotorg.org>:
      
      ARM: tegra: clock driver development
      
      This branch contains most fixes and enhancements to the Tegra common
      clock driver. The main new feature is a driver for Tegra114, which
      coupled with later device tree changes enables many devices on that
      chip, such as MMC, I2C, etc.
      
      This branch depends on a patch in:
      
      git://git.linaro.org/people/mturquette/linux.git clk-for-3.10
      
      Mike has stated that this branch is stable, and is aware of this
      dependency and merge.
      
      Mike's branch is based on v3.9-rc3, which includes a USB change which
      causes problems on Tegra. That problem was fixed in v3.9-rc4. Hence,
      this branch pulls in v3.9-rc4 to ensure bisectability as much as
      possible.
      
      This branch is based on v3.9-rc4, followed by a merge of previous Tegra
      "soc" pull request, followed by a merge of clk-for-3.10.
      
      * tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
        clk: tegra: fix enum tegra114_clk to match binding
        clk: tegra: Remove forced clk_enable of uartd
        ARM: dt: Add references to tegra_car clocks
        clk: tegra: devicetree match for nvidia,tegra114-car
        clk: tegra: Implement clocks for Tegra114
        ARM: tegra: Define Tegra114 CAR binding
        clk: tegra: Workaround for Tegra114 MSENC problem
        clk: tegra: Add flags to tegra_clk_periph()
        clk: tegra: Add new fields and PLL types for Tegra114
        clk: tegra: move from a lock bit idx to a lock mask
        clk: tegra: Add PLL post divider table
        clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
        clk: tegra: Add TEGRA_PLL_BYPASS flag
        clk: tegra: Refactor PLL programming code
        clk: tegra: provide dummy cpu car ops
        clk: tegra: defer application of init table
        clk: tegra: Fix cdev1 and cdev2 IDs
        clk: tegra: Make gr2d and gr3d clocks children of pll_c
        clk: tegra: Export peripheral reset functions
        clk: tegra: Fix periph_clk_to_bit macro
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      2b079101
    • A
      Merge branch 'depends/clk' into next/drivers · 5790c58b
      Arnd Bergmann 提交于
      This is a snapshot of the stable clk branch at
      
      git://git.linaro.org/people/mturquette/linux.git clk-for-3.10
      
      which is a dependency for the tegra clock changes.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      5790c58b
    • A
      Merge branch 'tegra/soc' into next/drivers · 1194b152
      Arnd Bergmann 提交于
      This is a dependency for the tegra/clk branch.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      
      Conflicts:
      	drivers/clocksource/tegra20_timer.c
      1194b152
    • A
      Merge tag 'omap-for-v3.10/gpmc-signed' of... · 86feb64f
      Arnd Bergmann 提交于
      Merge tag 'omap-for-v3.10/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
      
      From Tony Lindgren <tony@atomide.com>:
      
      GPMC updates from Jon Hunter <jon-hunter@ti.com>:
      
      Adds GPMC (General Purpose Memory Controller) DT support for
      NOR flash and Ethernet and includes various GPMC cleans-up
      and fixes.
      
      This series is dependent on commit 71856843 (ARM: OMAP: use
      consistent error checking) from RMK's clean-up branch and commit
      31d9adca (ARM: OMAP2+: Fix broken gpmc support).
      
      * tag 'omap-for-v3.10/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
        ARM: OMAP2+: Add GPMC DT support for Ethernet child nodes
        ARM: OMAP2+: rename gpmc_probe_nor_child() to gpmc_probe_generic_child()
        ARM: OMAP2+: return -ENODEV if GPMC child device creation fails
        ARM: OMAP2+: Allow GPMC probe to complete even if CS mapping fails
        ARM: OMAP2+: Remove unnecesssary GPMC definitions and variable
        ARM: OMAP2+: Detect incorrectly aligned GPMC base address
        ARM: OMAP2+: Convert ONENAND to retrieve GPMC settings from DT
        ARM: OMAP2+: Convert NAND to retrieve GPMC settings from DT
        ARM: OMAP2+: Add device-tree support for NOR flash
        ARM: OMAP2+: Add additional GPMC timing parameters
        ARM: OMAP2+: Add function to read GPMC settings from device-tree
        ARM: OMAP2+: Don't configure of chip-select options in gpmc_cs_configure()
        ARM: OMAP2+: Convert TUSB to use gpmc_cs_program_settings()
        ARM: OMAP2+: Convert SMC91x to use gpmc_cs_program_settings()
        ARM: OMAP2+: Convert NAND to use gpmc_cs_program_settings()
        ARM: OMAP2+: Convert ONENAND to use gpmc_cs_program_settings()
        ARM: OMAP2+: Add function for configuring GPMC settings
        ARM: OMAP2+: Add structure for storing GPMC settings
        ARM: OMAP2+: Add variable to store number of GPMC waitpins
        ARM: OMAP2+: Simplify code configuring ONENAND devices
        ...
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      86feb64f
    • A
      Merge tag 'omap-for-v3.10/timer-signed' of... · dc2d3db8
      Arnd Bergmann 提交于
      Merge tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
      
      From Tony Lindgren <tony@atomide.com>:
      
      Clean-up for omap2+ timers from Jon Hunter <jon-hunter@ti.com>:
      
      This series consists mainly of clean-ups for clockevents and
      clocksource timers on OMAP2+ devices. The most significant change
      in functionality comes from the 5th patch which is changing the
      selection of the clocksource timer for OMAP3 and AM335x devices
      when gptimers are used for clocksource.
      
      Note that this series depends on 71856843 (ARM: OMAP: use
      consistent error checking) in RMK's tree and 960cba67 (ARM:
      OMAP5: timer: Update the clocksource name as per clock data)
      in omap-for-v3.10/fixes-non-critical. So this branch is based
      on a merge of 71856843 and omap-for-v3.10/fixes-non-critical
      to avoid non-trivial merge conflicts.
      
      * tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
        ARM: OMAP4+: Fix sparse warning in system timers
        ARM: OMAP2+: Store ID of system timers in timer structure
        ARM: OMAP3: Update clocksource timer selection
        ARM: OMAP2+: Simplify system timers definitions
        ARM: OMAP2+: Simplify system timer clock definitions
        ARM: OMAP2+: Remove hard-coded test on timer ID
        ARM: OMAP2+: Display correct system timer name
        ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
        ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
        ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
        ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
        ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
        ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
        ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      dc2d3db8
    • A
      Merge tag 'omap-for-v3.10/usb-signed' of... · 8355ae69
      Arnd Bergmann 提交于
      Merge tag 'omap-for-v3.10/usb-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
      
      From Tony Lindgren <tony@atomide.com>:
      
      EHCI platform data related changes for v3.10 merge window.
      These are needed for the USB PHY support, and are based on
      commit 1f0972f5 from Felipe Balbi's tree as agreed on the
      mailing lists.
      
      * tag 'omap-for-v3.10/usb-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
        ARM: dts: omap3-beagle: Add USB Host support
        ARM: dts: OMAP3: Add HS USB Host IP nodes
        ARM: dts: OMAP4: Add HS USB Host IP nodes
        ARM: OMAP: zoom: Adapt to ehci-omap changes
        ARM: OMAP3: overo: Adapt to ehci-omap changes
        ARM: OMAP3: omap3touchbook: Adapt to ehci-omap changes
        ARM: OMAP3: omap3stalker: Adapt to ehci-omap changes
        ARM: OMAP3: omap3pandora: Adapt to ehci-omap changes
        ARM: OMAP3: omap3evm: Adapt to ehci-omap changes
        ARM: OMAP3: igep0020: Adapt to ehci-omap changes
        ARM: OMAP: devkit8000: Adapt to ehci-omap changes
        ARM: OMAP3: cm-t3517: Adapt to ehci-omap changes
        ARM: OMAP3: cm-t35: Adapt to ehci-omap changes
        ARM: OMAP: AM3517evm: Adapt to ehci-omap changes
        ARM: OMAP: AM3517crane: Adapt to ehci-omap changes
        ARM: OMAP3: 3630SDP: Adapt to ehci-omap changes
        ARM: OMAP3: 3430SDP: Adapt to ehci-omap changes
        ARM: OMAP3: Beagle: Adapt to ehci-omap changes
        ARM: OMAP2+: omap4panda: Adapt to ehci-omap changes
        ARM: OMAP2+: omap-usb-host: Add usbhs_init_phys()
        ...
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      8355ae69
    • C
      ARM: EXYNOS: Add arm-pmu DT binding for exynos421x · db35234e
      Chanho Park 提交于
      This patch adds a arm-pmu node to bind device tree for exynos4210.
      The exynos4210 and 4212 have two cpus which includes a pmu. In contrast, the
      exynos4412 has 4 cpus and pmus. We need to define two more pmus for this type
      board. However, supporting arm-pmu for the exynos4412 will handle it later
      because there is no dts support for 4412 based board.
      Signed-off-by: NChanho Park <chanho61.park@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      db35234e
    • C
      ARM: EXYNOS: Add arm-pmu DT binding for exynos5250 · 4f801e59
      Chanho Park 提交于
      This patch enables arm-pmu to bind device tree for exynos5250. The exynos5250
      has two pmus which have combiner irq type.
      Reviewed-by: NThomas Abraham <thomas.abraham@linaro.org>
      Signed-off-by: NChanho Park <chanho61.park@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      4f801e59
    • C
      ARM: EXYNOS: Enable PMUs for exynos4 · b7bbdbee
      Chanho Park 提交于
      This patch defines irq numbers of ARM performance monitoring unit for exynos4.
      Firs of all, we need to fix IRQ_PMU correctly and to split pmu initialization
      of exynos from plat-samsung for easily defining it.
      
      The number of CPU cores and PMU irq numbers are vary according to soc types.
      So, we need to identify each soc type using soc_is_xxx function and to define
      the pmu irqs dynamically. For example, the exynos4412 has 4 cpu cores and pmus.
      Signed-off-by: NChanho Park <chanho61.park@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      b7bbdbee