1. 02 5月, 2016 1 次提交
  2. 08 3月, 2016 2 次提交
  3. 07 2月, 2016 3 次提交
  4. 05 10月, 2015 10 次提交
  5. 03 10月, 2015 1 次提交
  6. 15 8月, 2015 1 次提交
  7. 05 8月, 2015 1 次提交
  8. 01 6月, 2015 1 次提交
  9. 27 3月, 2015 4 次提交
  10. 24 3月, 2015 1 次提交
  11. 11 3月, 2015 1 次提交
  12. 07 3月, 2015 3 次提交
  13. 10 1月, 2015 1 次提交
  14. 13 12月, 2014 1 次提交
  15. 26 11月, 2014 1 次提交
  16. 07 11月, 2014 1 次提交
  17. 06 11月, 2014 1 次提交
  18. 20 10月, 2014 1 次提交
  19. 11 9月, 2014 1 次提交
  20. 09 9月, 2014 1 次提交
  21. 28 7月, 2014 2 次提交
    • C
      serial: 8250_dw: Add support for deferred probing · c8ed99d4
      Chen-Yu Tsai 提交于
      The 8250_dw driver fails to probe if the specified clock isn't
      registered at probe time. Even if a clock frequency is given,
      the required clock might be gated because it wasn't properly
      enabled.
      
      This happened to me when the device is registered through DT,
      and the clock was part of an MFD, the PRCM found on A31 and A23
      SoCs. Unlike core clocks that are registered with OF_CLK_DECLARE,
      which happen almost immediately after the kernel starts, the
      clocks are registered as sub-devices of the PRCM MFD platform
      device. Even though devices are registered in the order they are
      found in the DT, the drivers are registered in a different,
      arbitrary order. It is possible that the 8250_dw driver is
      registered, and thus associated with the device and probed, before
      the clock driver is registered and probed.
      
      8250_dw then reports unable to get the clock, and fails. Without
      a working console, the kernel panics.
      
      This patch adds support for deferred probe handling for the clock
      and reset controller. It also fixes the cleanup path if
      serial8250_register_8250_port fails.
      Signed-off-by: NChen-Yu Tsai <wens@csie.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c8ed99d4
    • C
      serial: 8250_dw: Add optional reset control support · 7fe090bf
      Chen-Yu Tsai 提交于
      The Allwinner A31 and A23 SoCs have a reset controller
      maintaining the UART in reset by default.
      
      This patch adds optional reset support to the driver.
      Signed-off-by: NChen-Yu Tsai <wens@csie.org>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      7fe090bf
  22. 18 7月, 2014 1 次提交