1. 05 4月, 2008 1 次提交
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      [IA64] Multiple outstanding ptc.g instruction support · 2046b94e
      Fenghua Yu 提交于
      According to SDM2.2, Itanium supports multiple outstanding ptc.g instructions.
      But current kernel function ia64_global_tlb_purge() uses a spinlock to serialize
      ptc.g instructions issued by multiple processors. This serialization might have
      scalability issue on a big SMP machine where many processors could purge TLB
      in parallel.
      
      The patch fixes this problem by issuing multiple ptc.g instructions in
      ia64_global_tlb_purge(). It also adds support for the "PALO" table to get
      a platform view of the max number of outstanding ptc.g instructions (which
      may be different from the processor view found from PAL_VM_SUMMARY).
      
      PALO specification can be found at: http://www.dig64.org/home/DIG64_PALO_R1_0.pdf
      
      spinaphore implementation by Matthew Wilcox.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      2046b94e
  2. 04 4月, 2008 8 次提交
  3. 03 4月, 2008 31 次提交