1. 04 6月, 2009 1 次提交
  2. 23 5月, 2009 1 次提交
  3. 15 5月, 2009 1 次提交
  4. 01 5月, 2009 2 次提交
  5. 22 4月, 2009 1 次提交
  6. 18 4月, 2009 1 次提交
  7. 09 4月, 2009 2 次提交
    • E
      drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU. · 280b713b
      Eric Anholt 提交于
      Save the bit 17 state of the pages when freeing the page list, and
      reswizzle them if necessary when rebinding the pages (in case they were
      swapped out).  Since we have userland with expectations that the swizzle
      enums let it pread and pwrite contents accurately, we can't expose a new
      swizzle enum for bit 17 (which it would have to GTT map to handle), so we
      handle it down in pread and pwrite by swizzling the copy when bit 17 of the
      page address is set.
      Signed-off-by: NEric Anholt <eric@anholt.net>
      280b713b
    • B
      drm/i915: Implement batch and ring buffer dumping · 6911a9b8
      Ben Gamari 提交于
      We create a debugfs node (i915_ringbuffer_data) to expose a hex dump
      of the ring buffer itself.  We also expose another debugfs node
      (i915_ringbuffer_info) with information on the state (i.e. head, tail
      addresses) of the ringbuffer.
      
      For batchbuffer dumping, we look at the device's active_list, dumping
      each object which has I915_GEM_DOMAIN_COMMAND in its read
      domains. This is all exposed through the dri/i915_batchbuffers debugfs
      file with a header for each object (giving the objects gtt_offset so
      that it can be matched against the offset given in the
      BATCH_BUFFER_START command.
      Signed-off-by: NBen Gamari <bgamari@gmail.com>
      Signed-off-by: NCarl Worth <cworth@cworth.org>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      6911a9b8
  8. 02 4月, 2009 2 次提交
  9. 28 3月, 2009 6 次提交
  10. 13 3月, 2009 1 次提交
  11. 11 3月, 2009 2 次提交
  12. 23 2月, 2009 1 次提交
  13. 20 2月, 2009 1 次提交
  14. 08 2月, 2009 3 次提交
  15. 16 1月, 2009 1 次提交
    • D
      drm/i915: add support for physical memory objects · 71acb5eb
      Dave Airlie 提交于
      This is an initial patch to do support for objects which needs physical
      contiguous main ram, cursors and overlay registers on older chipsets.
      
      These objects are bound on cursor bin, like pinning, and we copy
      the data to/from the backing store object into the real one on attach/detach.
      
      notes:
      possible over the top in attach/detach operations.
      no overlay support yet.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      71acb5eb
  16. 07 1月, 2009 1 次提交
  17. 29 12月, 2008 5 次提交
  18. 19 12月, 2008 1 次提交
  19. 04 12月, 2008 2 次提交
  20. 26 11月, 2008 1 次提交
  21. 25 11月, 2008 2 次提交
  22. 11 11月, 2008 2 次提交
    • K
      drm/i915: Move legacy breadcrumb out of the reserved status page area · 0baf823a
      Keith Packard 提交于
      Addresses in the hardware status page below index 0x20 are reserved for use
      by the hardware. The legacy breadcrumb was sitting at index 5. Move it to
      index 0x21, and make sure everyone uses the defined value instead of
      hard-coded constants.
      Signed-off-by: NKeith Packard <keithp@keithp.com>
      Signed-off-by: NDave Airlie <airlied@linux.ie>
      0baf823a
    • E
      i915: Remove racy delayed vblank swap ioctl. · bd95e0a4
      Eric Anholt 提交于
      When userland detected that this ioctl was supported (by version number check),
      it used it in a racy way -- dispatch delayed swap, wait for vblank, continue
      rendering. As there was no mechanism for it to wait for the swap to finish,
      sometimes it would render before the swap and garbage would be displayed on
      the screen.
      
      By removing the ioctl and returning -EINVAL, userland returns to its previous,
      correct rendering path of waiting for a vblank then dispatching a swap.  The
      only path that could have used this ioctl correctly was page flipping, which
      relied on only one client running and emitting wait-for-vblank-before-rendering
      in the command stream.  That path also falls back correctly, at the performance
      cost of not being able to queue up rendering before the flip occurs.
      Signed-off-by: NEric Anholt <eric@anholt.net>
      Signed-off-by: NDave Airlie <airlied@linux.ie>
      bd95e0a4