1. 21 10月, 2014 1 次提交
  2. 23 9月, 2014 1 次提交
    • B
      drm/i915: Don't leak command parser tables on suspend/resume · 22cb99af
      Brad Volkin 提交于
      Ring init and cleanup are not balanced because we re-init the rings on
      resume without having cleaned them up on suspend. This leads to the
      driver leaking the parser's hash tables with a kmemleak signature such
      as this:
      
      unreferenced object 0xffff880405960980 (size 32):
        comm "systemd-udevd", pid 516, jiffies 4294896961 (age 10202.044s)
        hex dump (first 32 bytes):
          d0 85 46 c0 ff ff ff ff 00 00 00 00 00 00 00 00  ..F.............
          98 60 28 04 04 88 ff ff 00 00 00 00 00 00 00 00  .`(.............
        backtrace:
          [<ffffffff81816f9e>] kmemleak_alloc+0x4e/0xb0
          [<ffffffff811fa678>] kmem_cache_alloc_trace+0x168/0x2f0
          [<ffffffffc03e20a5>] i915_cmd_parser_init_ring+0x2a5/0x3e0 [i915]
          [<ffffffffc04088a2>] intel_init_ring_buffer+0x202/0x470 [i915]
          [<ffffffffc040c998>] intel_init_vebox_ring_buffer+0x1e8/0x2b0 [i915]
          [<ffffffffc03eff59>] i915_gem_init_hw+0x2f9/0x3a0 [i915]
          [<ffffffffc03f0057>] i915_gem_init+0x57/0x1d0 [i915]
          [<ffffffffc045e26a>] i915_driver_load+0xc0a/0x10e0 [i915]
          [<ffffffffc02e0d5d>] drm_dev_register+0xad/0x100 [drm]
          [<ffffffffc02e3b9f>] drm_get_pci_dev+0x8f/0x200 [drm]
          [<ffffffffc03c934b>] i915_pci_probe+0x3b/0x60 [i915]
          [<ffffffff81436725>] local_pci_probe+0x45/0xa0
          [<ffffffff81437a69>] pci_device_probe+0xd9/0x130
          [<ffffffff81524f4d>] driver_probe_device+0x12d/0x3e0
          [<ffffffff815252d3>] __driver_attach+0x93/0xa0
          [<ffffffff81522e1b>] bus_for_each_dev+0x6b/0xb0
      
      This patch extends the current convention of checking whether a
      resource is already allocated before allocating it during ring init.
      Longer term it might make sense to only init the rings once.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83794Tested-by: NKari Suvanto <kari.tj.suvanto@gmail.com>
      Signed-off-by: NBrad Volkin <bradley.d.volkin@intel.com>
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Cc: stable@vger.kernel.org
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      22cb99af
  3. 19 9月, 2014 2 次提交
  4. 13 8月, 2014 1 次提交
    • D
      drm/i915: Fix up checks for aliasing ppgtt · 896ab1a5
      Daniel Vetter 提交于
      A subsequent patch will no longer initialize the aliasing ppgtt if we
      have full ppgtt enabled, since we simply don't need that any more.
      
      Unfortunately a few places check for the aliasing ppgtt instead of
      checking for ppgtt in general. Fix them up.
      
      One special case are the gtt offset and size macros, which have some
      code to remap the aliasing ppgtt to the global gtt. The aliasing ppgtt
      is _not_ a logical address space, so passing that in as the vm is
      plain and simple a bug. So just WARN about it and carry on - we have a
      gracefully fall-through anyway if we can't find the vma.
      Reviewed-by: NMichel Thierry <michel.thierry@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      896ab1a5
  5. 18 6月, 2014 1 次提交
  6. 23 5月, 2014 1 次提交
  7. 13 5月, 2014 1 次提交
    • B
      drm/i915: Use hash tables for the command parser · 44e895a8
      Brad Volkin 提交于
      For clients that submit large batch buffers the command parser has
      a substantial impact on performance. On my HSW ULT system performance
      drops as much as ~20% on some tests. Most of the time is spent in the
      command lookup code. Converting that from the current naive search to
      a hash table lookup reduces the performance drop to ~10%.
      
      The choice of value for I915_CMD_HASH_ORDER allows all commands
      currently used in the parser tables to hash to their own bucket (except
      for one collision on the render ring). The tradeoff is that it wastes
      memory. Because the opcodes for the commands in the tables are not
      particularly well distributed, reducing the order still leaves many
      buckets empty. The increased collisions don't seem to have a huge
      impact on the performance gain, but for now anyhow, the parser trades
      memory for performance.
      
      NB: Ville noticed that the error paths through the ring init code
      will leak memory. I've not addressed that here. We can do a follow
      up pass to handle all of the leaks.
      
      v2: improved comment describing selection of hash key mask (Damien)
      replace a BUG_ON() with an error return (Tvrtko, Ville)
      commit message improvements
      Signed-off-by: NBrad Volkin <bradley.d.volkin@intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      44e895a8
  8. 05 5月, 2014 2 次提交
  9. 10 4月, 2014 1 次提交
  10. 02 4月, 2014 16 次提交
  11. 28 3月, 2014 1 次提交
    • D
      drm/i915: fix build warning on 32-bit (v2) · 60f2b4af
      Dave Airlie 提交于
      /ssd/git/drm-next/drivers/gpu/drm/i915/i915_cmd_parser.c: In function ‘i915_parse_cmds’:
      /ssd/git/drm-next/drivers/gpu/drm/i915/i915_cmd_parser.c:405:4: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 5 has type ‘int’ [-Wformat=]
          DRM_DEBUG_DRIVER("CMD: Command length exceeds batch length: 0x%08X length=%d batchlen=%ld\n",
          ^
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      60f2b4af
  12. 19 3月, 2014 1 次提交
  13. 08 3月, 2014 1 次提交
    • B
      drm/i915: Implement command buffer parsing logic · 351e3db2
      Brad Volkin 提交于
      The command parser scans batch buffers submitted via execbuffer ioctls before
      the driver submits them to hardware. At a high level, it looks for several
      things:
      
      1) Commands which are explicitly defined as privileged or which should only be
         used by the kernel driver. The parser generally rejects such commands, with
         the provision that it may allow some from the drm master process.
      2) Commands which access registers. To support correct/enhanced userspace
         functionality, particularly certain OpenGL extensions, the parser provides a
         whitelist of registers which userspace may safely access (for both normal and
         drm master processes).
      3) Commands which access privileged memory (i.e. GGTT, HWS page, etc). The
         parser always rejects such commands.
      
      See the overview comment in the source for more details.
      
      This patch only implements the logic. Subsequent patches will build the tables
      that drive the parser.
      
      v2: Don't set the secure bit if the parser succeeds
      Fail harder during init
      Makefile cleanup
      Kerneldoc cleanup
      Clarify module param description
      Convert ints to bools in a few places
      Move client/subclient defs to i915_reg.h
      Remove the bits_count field
      
      OTC-Tracker: AXIA-4631
      Change-Id: I50b98c71c6655893291c78a2d1b8954577b37a30
      Signed-off-by: NBrad Volkin <bradley.d.volkin@intel.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      [danvet: Appease checkpatch.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      351e3db2