Implement sysfs support to configure the ESD interval.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Separate the code which queues/cancels ESD work into their own
functions.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

ESD check in Taal driver is currently on/off feature with hardcoded
interval. This patch changes it to a configurable interval, which can be
set from the board file.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The panel drivers can leave the VDDS_DSI regulator enabled, even when
the panel is disabled, to ensure that the DSI pins are powered.

This patch ensures that VDDS_DSI is disabled on DSI module unload.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add dsi_mux_pads function pointer to omap_dss_board_info, and use the
function pointer in DSI code to configure the DSI pads either to normal
DSI operation, or to pull down when in ULPS.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add parameter to omapdss_dsi_display_disable() which the panel driver
can use to tell if the DSI lanes should be put to ULPS before disabling
the interface.

This can be used to skip ULPS entry in cases where the panel doesn't
care about ULPS state, for example when the panel will be reset, or when
the display interface will be enabled again right after the disable.

This will speed up the operation considerably in cases where entering
ULPS would fail with timeout, and the panel driver isn't even interested
in entering ULPS.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add dsi_cio_wait_tx_clk_esc_reset() function which waits for the
TXCLKESC domains to come out of reset.

Things have worked fine without this, but better be safe than sorry.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Use dsi_enable_scp_clk and dsi_disable_scp_clk in CIO init and uninit,
and improve the CIO init by adding a few status checks and error
handling.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

SCP clock is needed for CIO on OMAP3, and for CIO and PLL on OMAP4.
Current driver enables the CIO clock always when DSI display is
initialized. However, if a DPI display tries to use DSI PLL, the SCP
clock is never enabled.

This patch implements simple ref counting enable/disable functions for
SCP clock.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The bits for TXCLKESCx reset have changed for OMAP3630 and OMAP4.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

OMAP3430 has RESETDONETXCLKESCx bits in the order following bitnumber
order for lanes 0, 1, 2: 28, 27, 26. OMAP3630 and later have them in
saner order: 24, 25, 26 (and 27, 28 for OMAP4).

This patch adds a dss_feature that can be used to differentiate between
those two orders of RESETDONETXCLKESCx bits.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Rename ComplexIO from dsi_complexio_xxx to dsi_cio_xxx for brevity.
Also, add cio prefix for couple of functions that didn't have it, but
are cio related.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The DSI pins are powered by VDDS_DSI. If VDDS_DSI is off, the DSI pins
are floating even if they are pinmuxed to, say, safe mode and there's a
pull down/up.

This patch gives the panel drivers an option to leave the VDDS_DSI power
enabled while the DSS itself is turned off. This can be used to keep the
DSI lanes in a valid state while DSS is off, if the DSI pins are muxed
for pull down (not done in this patch).

There will be a slight power consumption increase (~100 uA?) when the
VDDS_DSI is left on, but because this option is used when the panel is
left on, the regulator consumption is negligible compared to panel power
consumption.

When the panel is fully turned off the VDDS_DSI is also turned off.

As an added bonus this will give us faster start up time when starting
up the DSS and the regulator is already enabled.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Entering ULPS (Ultra Low Power State) happens by sending ULPS entry
sequence to the DSI peripheral and pulling the DSI lines down.

Exiting ULPS happens by sending ULPS exit sequence.

We can send the ULPS entry sequence by using OMAP DSS HW's ULPS support,
but we cannot use the ULPS exit support from DSS HW. DSS HW refuses to
send the ULPS exit sequence if it thinks that the lanes are not in ULPS.
After being in OFF mode the DSS HW has been reset, and so it does not
know that the lanes are actually in ULPS.

Thus we need to use the lane override support and manually send the ULPS
exit sequence. Luckily the sequence is very simple.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

CIO LDO status check seems to be broken on OMAP3630+ chips, and it's
also quite unclear what LDO status actually tells and when its status
changes.

This patch removes the whole check on the grounds that if there's a
problem with the LDO, we should anyway catch the problem as we check the
CIO power state and CIO reset status.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

DSI_DSIPHY_CFG10 register can be used to override DSI lane state. Add
functions to configure and enable the override, and to disable the
override.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Currently, omap_display_init() maintains arrays for hwmod name(oh_name) and the
correspnding platform_device name(dev_name) needed by omap_device_build().
A variable oh_count keeps a track of the number of devices to build from oh_name
based on what omap revision it is.

Clean this up by maintaining an array of omap_dss_hwmod_data struct which is
defined for each omap revision as suggested by Tomi Valkeinen. Assign the
corresponding omap_dss_hwmod_data array struct to the pointer curr_dss_hwmod in
omap_display_init().
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

OMAP4 has clocks set up in a bit interesting way, causing, for example,
the DSS's "ick" to be called "dss_fck".

This patch changes the debugfs output to show both the DSS's name for
the clock (ie. basically the clock alias), and the real name from the
clock struct.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Convert simple/strict_strto* functions to kstrto* functions. Only simple
cases are converted.

simple_strto* uses are still left to places where it is used to parse
numbers from a list of numbers. These need some other solution than
kstrto*.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The clock sources for DISPC_FCLK and LCD1_CLK are now specified in the board file.
There is no need for the hack config "CONFIG_OMAP2_DSS_USE_DSI_PLL" anymore.
Introduce function dpi_use_dsi_pll() which checks for the clock sources to decide
whether DSI PLL is to be used or not.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Move some of the configurable HDMI PLL parameters to dssdev.clock struct.
Cleanup the function hdmi_compute_pll() by using the parameters defined in the
board file and do some cosmetic modifications.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add enum dss_clock_source in dssdev.clocks struct so that the clock sources can
be specified in the board file.
Replace hard coded clock sources in dsi.c, dpi.c and replace them with the new
clock source members in dssdev.clocks. Modify the sdp4430_lcd_device struct in
board-4430sdp.c to specify clock sources for DISPC_FCLK, LCD1_CLK and DSI1_FCLK.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Change enum dss_clk_source to omap_dss_clock_source and move it to
'plat/display.h'. Change the enum members to attach "OMAP_" in the beginning.
These changes are done in order to specify the clock sources for DSS in the
board file.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

We can use __exit for the driver remove function in plain dss panels
(ie. those that do not need i2c or spi).
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

omap_dss_register_device and omap_dss_unregister_device can only be
called from core.c, so we can make it static.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

VENC code was missing omap_dss_start/stop_device calls. This didn't
cause any problems as VENC could not be compiled as a module, but
nevertheless it's better to add the calls.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Currently omapfb does an implicit display update (for manual update
displays) on unblank.

There is no guarantee that the framebuffer contains a valid image when
unblank is called. When using manual update displays it is the
responsibility of the user space to update the display, and so it should
be in this case also.

This patch removes the implicit display update on unblank.
Signed-off-by: NJani Nikula <ext-jani.1.nikula@nokia.com>
[tomi.valkeinen@ti.com: improved description]
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Errors from the panel driver were ignored during panel initialization.
Handle the errors and fail accordingly.

Also move the display initialization to a separate function to make it
cleaner.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add get_dimensions() to struct omap_dss_driver. Use the call, if supported
by the driver, in OMAPFB.
Signed-off-by: NJani Nikula <ext-jani.1.nikula@nokia.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

VENC code had 50ms sleep after enabling the output and 100ms sleep after
disabling the output. I don't see any reason for these sleeps.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

There's a 20ms sleep after VENC reset. It's unknown what bug this
circumvents and on what platforms. Add a Kconfig option to disable the
sleep.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

For some unknown reason we may get SYNC_LOST errors from the display
subsystem at initialization time if we don't sleep before resetting the
DSS. See the source (dss.c) for more comments.

However, 50ms is quite long time to sleep, and with some configurations
the SYNC_LOST may never happen, so this patch creates a Kconfig option
to disable the sleep.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The sleep workaround for the problem described in the comment doesn't
really work. This patch removes the workaround, and improves the comment
about the bug, and proposes an userspace workaround.

omap_dss_set_manager() is called 6 times when loading omapdss and
omapfb, which means that 40ms * 6 = 240ms was spent sleeping when
booting up.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Clock configuration was defined inside dssdev.phy.dsi struct. The clock
config doesn't really belong there, and so it's moved to dssdev.clock
struct.

Now the explicit clock configuration could also be used for other
interfaces than DSI, although there's no support for it currently.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The DSI protocol engine has no interrupt for signalling the end of a Frame
transfer. The present approach is to send a BTA after DISPC generates a
FRAMEDONE interrupt, and unlock the dsi bus only when the BTA Ack is received.

The assumption made with this approach was that OMAP will send a BTA only after
the long packet corresponding to the last line is sent. However, it is possible
that on the DISPC FRAMEDONE interrupt there are 2 (or more) lines of pixel data
in the DSI line buffer. Hence, the BTA Ack could be received for the long packet
corresponding to the second last line (or the third last and so on..).
Therefore, the current method doesn't ensure that the complete frame data is
sent before we start a new transfer. A similar explanation holds valid if we
send a BTA in between multiple short/long command packets from the slave port.

Introduce dsi_sync_vc functions, based on Tomi Valkeinen's idea, which ensure
that the DSI Virtual Channel in use(update_channel) completes its previous work
before proceeding to the next Frame/Command.

For a frame update, the DSI driver now sends a callback to the Panel Driver
on the FRAMEDONE interrupt itself. The callback in the panel driver then unlocks
the bus. dsi_sync_vc() functions are placed in dsi_vc_config_l4() and
dsi_vc_config_vp() to ensure that the previous task of the Virtual Channel is
completed.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The following changes have changed from OMAP3 to OMAP4 DSI:
-The register field DSI_PLL_FREQSEL in DSI_PLL_CONFIGURATION2 has been removed.
-DCS_CMD_ENABLE and DCS_CMD_CODE bits have been moved from DSI_CTRL to
DSI_VC_CTRLi, hence the control of the bits is available per VC.
-DSI LDO powergood notification doesn't work on OMAP4. This is mentioned in
OMAP4 errata revision 1.8(Errata 1.76).
-OCP_WIDTH register field is included in DSI_VC_CTRL.
-The SCP clock is also required to access DSI PLL registers

Introduce dss features for these changes so that DSI runs on both OMAP3 and
OMAP4.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

All DPI panels were missing dependency to OMAP2_DSS_DPI. Add the
dependency.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

OMAP3630 has a HW bug causing DSI PLL power command POWER_ON_DIV (0x3)
to not work properly. The bug prevents us from enabling DSI PLL power
only to HS divider block.

This patch adds a dss feature for the bug and converts POWER_ON_DIV
requests to POWER_ON_ALL (0x2).
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init.
For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as
dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns the
default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock dumps when
dispc_clk_source is not DSS_CLK_SRC_FCK.

Correct this function to always return dss.dispc_clk_source for OMAP2/3.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

On OMAP4, reading DSI_PLL_CONFIGURATION2 register requires the L3 clock
(CIO_CLK_ICG) to PLL. Currently dsi_dump_clocks() tries to read that
register without enabling the L3 clock, leading to crash if DSI is not
in use.

The status of the bit being read from DSI_PLL_CONFIGURATION2 is
available from dsi_clock_info->use_sys_clk, so we can avoid the whole
problem by just using that.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>