- 12 1月, 2015 1 次提交
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由 Adrian Hunter 提交于
Add PCI IDs for SPT eMMC, SDIO and SD card. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 05 12月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under drivers/mmc/. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 02 12月, 2014 2 次提交
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由 Adrian Hunter 提交于
BYT host controllers are capable of doing the bus width test and of waiting while busy, so add the capability flags. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC actually causes standard-compliant behaviour by causing the flagging of the last DMA transfer descriptor as the end instead of there being an additional nop descriptor which is flagged as the end. Consequently, it is better to have the quirk. Add it for BYT. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 26 11月, 2014 2 次提交
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由 Vincent Wan 提交于
AMD SD controller supports the SDR104 mode, but caps2 can not be promoted to support hs200 for eMMC. Signed-off-by: NVincent Wan <vincent.wan@amd.com> Signed-off-by: NWan Zongshun <mcuos.com@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Vincent Wan 提交于
This patch is to enable the quirk for AMD sdhci requiring transfer mode register need to be cleared for commands without data Signed-off-by: NVincent Wan <vincent.wan@amd.com> Signed-off-by: NWan Zongshun <mcuos.com@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 11月, 2014 1 次提交
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由 Adrian Hunter 提交于
Set a 64-bit DMA mask when using 64-bit DMA. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 03 10月, 2014 3 次提交
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由 Adrian Hunter 提交于
Braswell eMMC host controller specifies an incorrect timeout clock frequncy in the capabilities registers. The correct value is 1 MHz. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Add support for card detect for Bay Trail and Braswell SD Card host controllers in PCI mode. This uses the gpio descriptor API which can find gpio descriptors, for example, on an ACPI comapnion device. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Add quirk SDHCI_QUIRK2_STOP_WITH_TC for Intel BYT host controllers. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 09 9月, 2014 4 次提交
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由 Gao, Yunpeng 提交于
Due to HW issue, SDHCI host controller on Intel Baytrail/Merrifield platforms can not use preset register. So, disable preset registers for them by quirks. Signed-off-by: NYunpeng Gao <yunpeng.gao@intel.com> Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Gao, Yunpeng 提交于
Enable runtime pm support on Intel Merrifield platform. Signed-off-by: NYunpeng Gao <yunpeng.gao@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Alan Cox 提交于
The hardware is the same as used in Baytrail. Add these new PCI IDs to the driver's list of supported IDs. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Peter Griffin 提交于
This allows us to get rid of the #else condition, as the macro compiles away to nothing if not enabled. Signed-off-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 26 7月, 2014 1 次提交
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由 Chuanxiao.Dong 提交于
It is not required (in fact it even is not recommended) that a PCI driver's suspend() callback save the standard configuration registers of the device, prepare it for waking up the system, or put it into a low-power state. All of these operations can very well be taken care of by the PCI subsystem, without the driver's participation. Thus remove these PCI functions. For the device which has wake up capability, use device_init_wakeup to init the wake up capability so that PCI core will help to enable the wakeup for it. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 7月, 2014 2 次提交
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由 Maurice Petallo 提交于
This is to enable DDR50 bus speed mode with 1.8V signaling capability for BayTrail ACPI and PCI mode eMMC Controller. Signed-off-by: NMaurice Petallo <mauricex.r.petallo@intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Maurice Petallo 提交于
"SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit preset value enabling for Baytrail eMMC controller. Signed-off-by: NMaurice Petallo <mauricex.r.petallo@intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 09 7月, 2014 1 次提交
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由 Derek Browne 提交于
This patch is to enable SDIO host controller for Intel Quark X1000. Signed-off-by: NDerek Browne <Derek.Browne@intel.com> Signed-off-by: NAlvin (Weike) Chen <alvin.chen@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 22 5月, 2014 4 次提交
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由 Russell King 提交于
Add sdhci_set_uhs_signaling() and always call the set_uhs_signaling method. This avoids quirks being added into sdhci_set_uhs_signaling(). Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> [Ulf Hansson] Resolved conflict Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Rather than having platform_reset_enter/platform_reset_exit methods, turn the core of the reset handling into a library function which platforms can call at the appropriate moment in their (new) reset method. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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- 23 2月, 2014 1 次提交
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由 Micky Ching 提交于
Add support for realtek rts5250 pci card reader. The card reader has some problems with DDR50 mode, so add a new quirks2 for broken ddr50. Signed-off-by: NMicky Ching <micky_ching@realsil.com.cn> Signed-off-by: NChris Ball <chris@printf.net>
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- 23 1月, 2014 1 次提交
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由 Adrian Hunter 提交于
It is possible for chip->fixes to be null. Check before dereferencing it. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable <stable@vger.kernel.org> # 3.11+ Signed-off-by: NChris Ball <chris@printf.net>
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- 20 1月, 2014 1 次提交
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由 Adrian Hunter 提交于
A host controller for a SD card may need a GPIO for card detect in order to wake up from runtime suspend when a card is inserted. If that GPIO is not configured, then the host controller will not wake up. Fix that for the affected devices by not enabling runtime PM unless the GPIO is successfully set up. This affects BYT sd card host controller which had runtime PM enabled from v3.11. For completeness, the MFD sd card host controller is flagged also. The original patch before rebasing (see link below) was tested on v3.11.10 and v3.12.4 although the patch applied with some offsets and fuzz. The original patch is here: http://marc.info/?l=linux-mmc&m=138676702327057Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable <stable@vger.kernel.org> # 3.11+ Signed-off-by: NChris Ball <chris@printf.net>
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- 14 1月, 2014 3 次提交
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由 David Cohen 提交于
Due to unknown hw issue so far, Merrifield is unable to enable HS200 support. This patch adds quirk to avoid SDHCI to initialize with error below: [ 53.850132] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.12.0-rc6-00037-g3d7c8d9-dirty #36 [ 53.850150] Hardware name: Intel Corporation Merrifield/SALT BAY, BIOS 397 2013.09.12:11.51.40 [ 53.850167] 00000000 00000000 ee409e48 c18816d2 00000000 ee409e78 c123e254 c1acc9b0 [ 53.850227] 00000000 00000000 c1b14148 000003de c16c03bf c16c03bf ee75b480 ed97c54c [ 53.850282] ee75b480 ee409e88 c123e292 00000009 00000000 ee409ef8 c16c03bf c1207fac [ 53.850339] Call Trace: [ 53.850376] [<c18816d2>] dump_stack+0x4b/0x79 [ 53.850408] [<c123e254>] warn_slowpath_common+0x84/0xa0 [ 53.850436] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50 [ 53.850462] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50 [ 53.850490] [<c123e292>] warn_slowpath_null+0x22/0x30 [ 53.850516] [<c16c03bf>] sdhci_send_command+0xb4f/0xc50 [ 53.850545] [<c1207fac>] ? native_sched_clock+0x2c/0xb0 [ 53.850575] [<c14c1f93>] ? delay_tsc+0x73/0xb0 [ 53.850601] [<c14c1ebe>] ? __const_udelay+0x1e/0x20 [ 53.850626] [<c16bdeb3>] ? sdhci_reset+0x93/0x190 [ 53.850654] [<c16c05b0>] sdhci_finish_data+0xf0/0x2e0 [ 53.850683] [<c16c130f>] sdhci_irq+0x31f/0x930 [ 53.850713] [<c12cb080>] ? __buffer_unlock_commit+0x10/0x20 [ 53.850740] [<c12cbcd7>] ? trace_buffer_unlock_commit+0x37/0x50 [ 53.850773] [<c1288f3c>] handle_irq_event_percpu+0x5c/0x220 [ 53.850800] [<c128bc96>] ? handle_fasteoi_irq+0x16/0xd0 [ 53.850827] [<c128913a>] handle_irq_event+0x3a/0x60 [ 53.850852] [<c128bc80>] ? unmask_irq+0x30/0x30 [ 53.850878] [<c128bcce>] handle_fasteoi_irq+0x4e/0xd0 [ 53.850895] <IRQ> [<c1890b52>] ? do_IRQ+0x42/0xb0 [ 53.850943] [<c1890a31>] ? common_interrupt+0x31/0x38 [ 53.850973] [<c12b00d8>] ? cgroup_mkdir+0x4e8/0x580 [ 53.851001] [<c1208d32>] ? default_idle+0x22/0xf0 [ 53.851029] [<c1209576>] ? arch_cpu_idle+0x26/0x30 [ 53.851054] [<c1288505>] ? cpu_startup_entry+0x65/0x240 [ 53.851082] [<c18793d5>] ? rest_init+0xb5/0xc0 [ 53.851108] [<c1879320>] ? __read_lock_failed+0x18/0x18 [ 53.851138] [<c1bf6a15>] ? start_kernel+0x31b/0x321 [ 53.851164] [<c1bf652f>] ? repair_env_string+0x51/0x51 [ 53.851190] [<c1bf6363>] ? i386_start_kernel+0x139/0x13c [ 53.851209] ---[ end trace 92777f5fe48d33f2 ]--- [ 53.853449] mmcblk0: error -84 transferring data, sector 11142162, nr 304, cmd response 0x0, card status 0x0 [ 53.853476] mmcblk0: retrying using single block read [ 55.937863] sdhci: Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock [ 56.207951] sdhci: Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock [ 66.228785] mmc0: Timeout waiting for hardware interrupt. [ 66.230855] ------------[ cut here ]------------ Signed-off-by: NDavid Cohen <david.a.cohen@linux.intel.com> Reviewed-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Acked-by: NDong Aisheng <b29396@freescale.com> Cc: stable <stable@vger.kernel.org> # [3.13] Signed-off-by: NChris Ball <chris@printf.net>
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由 Adam Lee 提交于
Add O2Micro/BayHubTech SD Host DeviceId 8520 support. Add O2Micro/BayHubTech SD Host DeviceId 8420 & 8421 support. Add O2Micro/BayHubTech SD Host DeviceId 8620 & 8621 support. These card readers are used in laptops like Lenovo ThinkPad W540, Dell Latitude E5440, Dell Latitude E6540. Signed-off-by: NPeter Guo <peter.guo@bayhubtech.com> Signed-off-by: NAdam Lee <adam.lee@canonical.com> Signed-off-by: NChris Ball <chris@printf.net>
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由 Adam Lee 提交于
Break out definitions in sdhci-pci.c to sdhci-pci.h, for introducing module files like sdhci-pci-xxx.c Signed-off-by: NAdam Lee <adam.lee@canonical.com> Signed-off-by: NChris Ball <chris@printf.net>
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- 31 10月, 2013 1 次提交
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由 Eric Ernst 提交于
This patch adds intel_mid clovertrail SDIO and eMMC device IDs to the sdhci-pci driver. Signed-off-by: NEric Ernst <eric.ernst@linux.intel.com> Signed-off-by: NDavid Cohen <david.a.cohen@linux.intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 22 10月, 2013 1 次提交
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由 David Cohen 提交于
Implement initial SDHCI Intel Merrifield support. This patch is based on previous one from Yunpeng Gao <yunpeng.gao@intel.com>. Signed-off-by: NDavid Cohen <david.a.cohen@linux.intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 06 7月, 2013 2 次提交
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由 Adrian Hunter 提交于
Add another PCI device id for an eMMC host controller. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Adrian Hunter 提交于
Add support for eMMC hardware reset for BYT eMMC. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 27 5月, 2013 2 次提交
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由 Adrian Hunter 提交于
Add support for runtime PM for BYT SD cards. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Adrian Hunter 提交于
Add three more PCI device ids. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 15 4月, 2013 1 次提交
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由 Adrian Hunter 提交于
Add MMC_CAP2_NO_PRESCAN_POWERUP to sdhci-pci.c also, use mmc_power_off() for MMC_CAP2_NO_PRESCAN_POWERUP. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> [cjb: previously applied v1 of this patch instead of v4] Signed-off-by: NChris Ball <cjb@laptop.org>
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- 23 3月, 2013 2 次提交
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由 Lars-Peter Clausen 提交于
Basically all drivers can have sdhci_ops struct const, but almost none do. This patch constifies all sdhci_ops struct declarations where possible. The patch was auto-generated with the following coccinelle semantic patch: // <smpl> @r1@ identifier ops; identifier fld; @@ ops.fld = ...; @disable optional_qualifier@ identifier ops != r1.ops; @@ static +const struct sdhci_ops ops = { ... }; // </smpl> Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Aaron Lu 提交于
ACPI spec 5 defined the _ADR encoding for sdio bus as: High word - slot number (0 based) Low word - function number This patch adds support for binding sdio function device with acpi node, and if successful, involve acpi into its power management. Signed-off-by: NAaron Lu <aaron.lu@intel.com> Reviewed-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 25 2月, 2013 1 次提交
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由 Sascha Hauer 提交于
The 8bit in the function name is misleading. When set, it will be used to set the bus width, regardless of whether 8bit or another bus width is requested, so change the function name to platform_bus_width. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Tested-by: NDirk Behme <dirk.behme@de.bosch.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 07 12月, 2012 1 次提交
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由 Madhvapathi Sriram 提交于
The Ricoh SDHCI controllers support Highspeed clocks as evident from the ricoh_mmc_probe_slot() settings. Hence, SDHCI_CAN_DO_HISPD needs to be set to enable SDIO client drivers to set/enable high speed clock settings Signed-off-by: NMadhvapathi Sriram <Madhvapathi.Sriram@csr.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 29 11月, 2012 1 次提交
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由 Bill Pemberton 提交于
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: NBill Pemberton <wfp5p@virginia.edu> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Chris Ball <cjb@laptop.org> Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl> Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com> Cc: Venkatraman S <svenkatr@ti.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Ian Molton <ian@mnementh.co.uk> Cc: Bruce Chang <brucechang@via.com.tw> Cc: Harald Welte <HaraldWelte@viatech.com> Cc: Pierre Ossman <pierre@ossman.eu> Acked-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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