1. 14 4月, 2015 1 次提交
  2. 04 4月, 2015 4 次提交
  3. 02 4月, 2015 2 次提交
  4. 05 3月, 2015 1 次提交
    • T
      ARM: multi_v7_defconfig: increase the number of maximum number of CPUs to 16 · b09e0ec4
      Tyler Baker 提交于
      The HiSilicon HiP04 has 16 CPUs. I propose we increase the maximum number of CPUs to 16 to avoid the following warning identified during automated boot testing [1].
      
      ------------[ cut here ]------------
      WARNING: CPU: 0 PID: 0 at ../arch/arm/kernel/devtree.c:144 arm_dt_init_cpu_maps+0x118/0x1e8()
      DT /cpu 9 nodes greater than max cores 8, capping them
      Modules linked in:
      CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-00528-gbdccc4ed #1
      Hardware name: Hisilicon HiP04 (Flattened Device Tree)
      [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
      [] (show_stack) from [] (dump_stack+0x78/0x94)
      [] (dump_stack) from [] (warn_slowpath_common+0x74/0xb0)
      [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
      [] (warn_slowpath_fmt) from [] (arm_dt_init_cpu_maps+0x118/0x1e8)
      [] (arm_dt_init_cpu_maps) from [] (setup_arch+0x638/0x9a0)
      [] (setup_arch) from [] (start_kernel+0x8c/0x3b4)
      [] (start_kernel) from [<10208074>] (0x10208074)
      ---[ end trace cb88537fdc8fa200 ]---
      
      [1] http://storage.kernelci.org/mainline/v3.19-528-gbdccc4edeb03/arm-multi_v7_defconfig/lab-tbaker/boot-hip04-d01.html
      
      Cc: Olof Johansson <olof@lixom.net>
      Cc: Kevin Hilman <khilman@kernel.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: NTyler Baker <tyler.baker@linaro.org>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      b09e0ec4
  5. 26 2月, 2015 1 次提交
  6. 23 2月, 2015 1 次提交
  7. 29 1月, 2015 1 次提交
  8. 16 1月, 2015 1 次提交
  9. 15 1月, 2015 2 次提交
  10. 12 1月, 2015 1 次提交
  11. 09 1月, 2015 1 次提交
  12. 07 1月, 2015 2 次提交
  13. 02 1月, 2015 1 次提交
  14. 30 12月, 2014 1 次提交
    • S
      Add USB_EHCI_EXYNOS to multi_v7_defconfig · 007487f1
      Steev Klimaszewski 提交于
      Currently we enable Exynos devices in the multi v7 defconfig, however, when
      testing on my ODROID-U3, I noticed that USB was not working.  Enabling this
      option causes USB to work, which enables networking support as well since the
      ODROID-U3 has networking on the USB bus.
      
      [arnd] Support for odroid-u3 was added in 3.10, so it would be nice to
      backport this fix at least that far.
      Signed-off-by: NSteev Klimaszewski <steev@gentoo.org>
      Cc: stable@vger.kernel.org # 3.10
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      007487f1
  15. 16 12月, 2014 1 次提交
  16. 05 12月, 2014 1 次提交
  17. 28 11月, 2014 1 次提交
  18. 20 11月, 2014 4 次提交
  19. 18 11月, 2014 2 次提交
  20. 29 10月, 2014 1 次提交
  21. 24 10月, 2014 1 次提交
  22. 21 10月, 2014 1 次提交
  23. 26 9月, 2014 2 次提交
  24. 25 9月, 2014 2 次提交
  25. 05 9月, 2014 2 次提交
  26. 03 9月, 2014 1 次提交
  27. 23 8月, 2014 1 次提交
    • S
      ARM: multi_v7_defconfig: Enable Zynq/Xilinx drivers · b80c0662
      Soren Brinkmann 提交于
      This is a squashed series from Soren:
      
      "I went through the defconfig and searched for Zynq drivers. The result
      is this series of patches. The first few are all for Zynq and pretty
      much straight forward. The second half is mostly soft-IP, I think. That
      soft-IP works with Zynq devices, but I'm not sure whether those should
      go into the multi_v7 defconfig."
      
      Soren Brinkmann (11):
        ARM: multi_v7_defconfig: Enable Zynq cpuidle driver
        ARM: multi_v7_defconfig: Enable Zynq/Xilinx CAN driver
        ARM: multi_v7_defconfig: Enable XADC driver
        ARM: multi_v7_defconfig: Enable Zynq SPI driver
        ARM: multi_v7_defconfig: Enable Zynq GPIO driver
        ARM: multi_v7_defconfig: Enable Xilinx I2C driver
        ARM: multi_v7_defconfig: Enable Xilinx SPI driver
        ARM: multi_v7_defconfig: Enable Xilinx GPIO driver
        ARM: multi_v7_defconfig: Enable Xilinx VDMA driver
        ARM: multi_v7_defconfig: Enable Xilinx emaclite driver
        ARM: multi_v7_defconfig: Enable Xilinx watchdog timer
      Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
      [olof: Added commit message from series envelope email, squashed to
      one patch]
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      b80c0662