1. 24 11月, 2019 1 次提交
  2. 06 11月, 2019 1 次提交
  3. 15 6月, 2019 1 次提交
    • A
      ARM: prevent tracing IPI_CPU_BACKTRACE · e0c3fc1f
      Arnd Bergmann 提交于
      [ Upstream commit be167862ae7dd85c56d385209a4890678e1b0488 ]
      
      Patch series "compiler: allow all arches to enable
      CONFIG_OPTIMIZE_INLINING", v3.
      
      This patch (of 11):
      
      When function tracing for IPIs is enabled, we get a warning for an
      overflow of the ipi_types array with the IPI_CPU_BACKTRACE type as
      triggered by raise_nmi():
      
        arch/arm/kernel/smp.c: In function 'raise_nmi':
        arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
          trace_ipi_raise(target, ipi_types[ipinr]);
      
      This is a correct warning as we actually overflow the array here.
      
      This patch raise_nmi() to call __smp_cross_call() instead of
      smp_cross_call(), to avoid calling into ftrace.  For clarification, I'm
      also adding a two new code comments describing how this one is special.
      
      The warning appears to have shown up after commit e7273ff4 ("ARM:
      8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI"), which changed the
      number assignment from '15' to '8', but as far as I can tell has existed
      since the IPI tracepoints were first introduced.  If we decide to
      backport this patch to stable kernels, we probably need to backport
      e7273ff4 as well.
      
      [yamada.masahiro@socionext.com: rebase on v5.1-rc1]
      Link: http://lkml.kernel.org/r/20190423034959.13525-2-yamada.masahiro@socionext.com
      Fixes: e7273ff4 ("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI")
      Fixes: 365ec7b1 ("ARM: add IPI tracepoints") # v3.17
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Christophe Leroy <christophe.leroy@c-s.fr>
      Cc: Mathieu Malaterre <malat@debian.org>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Stefan Agner <stefan@agner.ch>
      Cc: Boris Brezillon <bbrezillon@kernel.org>
      Cc: Miquel Raynal <miquel.raynal@bootlin.com>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Cc: Brian Norris <computersforpeace@gmail.com>
      Cc: Marek Vasut <marek.vasut@gmail.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Borislav Petkov <bp@suse.de>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      e0c3fc1f
  4. 04 6月, 2019 1 次提交
  5. 17 5月, 2019 1 次提交
  6. 20 4月, 2019 1 次提交
  7. 06 4月, 2019 3 次提交
    • R
      ARM: avoid Cortex-A9 livelock on tight dmb loops · 30d503ba
      Russell King 提交于
      [ Upstream commit 5388a5b82199facacd3d7ac0d05aca6e8f902fed ]
      
      machine_crash_nonpanic_core() does this:
      
      	while (1)
      		cpu_relax();
      
      because the kernel has crashed, and we have no known safe way to deal
      with the CPU.  So, we place the CPU into an infinite loop which we
      expect it to never exit - at least not until the system as a whole is
      reset by some method.
      
      In the absence of erratum 754327, this code assembles to:
      
      	b	.
      
      In other words, an infinite loop.  When erratum 754327 is enabled,
      this becomes:
      
      1:	dmb
      	b	1b
      
      It has been observed that on some systems (eg, OMAP4) where, if a
      crash is triggered, the system tries to kexec into the panic kernel,
      but fails after taking the secondary CPU down - placing it into one
      of these loops.  This causes the system to livelock, and the most
      noticable effect is the system stops after issuing:
      
      	Loading crashdump kernel...
      
      to the system console.
      
      The tested as working solution I came up with was to add wfe() to
      these infinite loops thusly:
      
      	while (1) {
      		cpu_relax();
      		wfe();
      	}
      
      which, without 754327 builds to:
      
      1:	wfe
      	b	1b
      
      or with 754327 is enabled:
      
      1:	dmb
      	wfe
      	b	1b
      
      Adding "wfe" does two things depending on the environment we're running
      under:
      - where we're running on bare metal, and the processor implements
        "wfe", it stops us spinning endlessly in a loop where we're never
        going to do any useful work.
      - if we're running in a VM, it allows the CPU to be given back to the
        hypervisor and rescheduled for other purposes (maybe a different VM)
        rather than wasting CPU cycles inside a crashed VM.
      
      However, in light of erratum 794072, Will Deacon wanted to see 10 nops
      as well - which is reasonable to cover the case where we have erratum
      754327 enabled _and_ we have a processor that doesn't implement the
      wfe hint.
      
      So, we now end up with:
      
      1:      wfe
              b       1b
      
      when erratum 754327 is disabled, or:
      
      1:      dmb
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              wfe
              b       1b
      
      when erratum 754327 is enabled.  We also get the dmb + 10 nop
      sequence elsewhere in the kernel, in terminating loops.
      
      This is reasonable - it means we get the workaround for erratum
      794072 when erratum 754327 is enabled, but still relinquish the dead
      processor - either by placing it in a lower power mode when wfe is
      implemented as such or by returning it to the hypervisior, or in the
      case where wfe is a no-op, we use the workaround specified in erratum
      794072 to avoid the problem.
      
      These as two entirely orthogonal problems - the 10 nops addresses
      erratum 794072, and the wfe is an optimisation that makes the system
      more efficient when crashed either in terms of power consumption or
      by allowing the host/other VMs to make use of the CPU.
      
      I don't see any reason not to use kexec() inside a VM - it has the
      potential to provide automated recovery from a failure of the VMs
      kernel with the opportunity for saving a crashdump of the failure.
      A panic() with a reboot timeout won't do that, and reading the
      libvirt documentation, setting on_reboot to "preserve" won't either
      (the documentation states "The preserve action for an on_reboot event
      is treated as a destroy".)  Surely it has to be a good thing to
      avoiding having CPUs spinning inside a VM that is doing no useful
      work.
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      30d503ba
    • V
      ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of · d8945878
      Vladimir Murzin 提交于
      [ Upstream commit 72cd4064fccaae15ab84d40d4be23667402df4ed ]
      
      ARMv8M introduces support for Security extension to M class, among
      other things it affects exception handling, especially, encoding of
      EXC_RETURN.
      
      The new bits have been added:
      
      Bit [6]	Secure or Non-secure stack
      Bit [5]	Default callee register stacking
      Bit [0]	Exception Secure
      
      which conflicts with hard-coded value of EXC_RETURN:
      
      In fact, we only care of few bits:
      
      Bit [3]	 Mode (0 - Handler, 1 - Thread)
      Bit [2]	 Stack pointer selection (0 - Main, 1 - Process)
      
      We can toggle only those bits and left other bits as they were on
      exception entry.
      
      It is basically, what patch does - saves EXC_RETURN when we do
      transition form Thread to Handler mode (it is first svc), so later
      saved value is used instead of EXC_RET_THREADMODE_PROCESSSTACK.
      Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      d8945878
    • S
      ARM: 8840/1: use a raw_spinlock_t in unwind · d81bdb3c
      Sebastian Andrzej Siewior 提交于
      [ Upstream commit 74ffe79ae538283bbf7c155e62339f1e5c87b55a ]
      
      Mostly unwind is done with irqs enabled however SLUB may call it with
      irqs disabled while creating a new SLUB cache.
      
      I had system freeze while loading a module which called
      kmem_cache_create() on init. That means SLUB's __slab_alloc() disabled
      interrupts and then
      
      ->new_slab_objects()
       ->new_slab()
        ->setup_object()
         ->setup_object_debug()
          ->init_tracking()
           ->set_track()
            ->save_stack_trace()
             ->save_stack_trace_tsk()
              ->walk_stackframe()
               ->unwind_frame()
                ->unwind_find_idx()
                 =>spin_lock_irqsave(&unwind_lock);
      Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      d81bdb3c
  8. 24 3月, 2019 1 次提交
  9. 20 2月, 2019 10 次提交
  10. 13 2月, 2019 1 次提交
    • Y
      ARM: 8808/1: kexec:offline panic_smp_self_stop CPU · 46602077
      Yufen Wang 提交于
      [ Upstream commit 82c08c3e7f171aa7f579b231d0abbc1d62e91974 ]
      
      In case panic() and panic() called at the same time on different CPUS.
      For example:
      CPU 0:
        panic()
           __crash_kexec
             machine_crash_shutdown
               crash_smp_send_stop
             machine_kexec
               BUG_ON(num_online_cpus() > 1);
      
      CPU 1:
        panic()
          local_irq_disable
          panic_smp_self_stop
      
      If CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop(), kdump
      fails. CPU1 can't receive the ipi irq, CPU1 will be always online.
      To fix this problem, this patch split out the panic_smp_self_stop()
      and add set_cpu_online(smp_processor_id(), false).
      Signed-off-by: NYufen Wang <wangyufen@huawei.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      46602077
  11. 06 12月, 2018 1 次提交
  12. 12 10月, 2018 1 次提交
  13. 23 8月, 2018 2 次提交
  14. 03 8月, 2018 3 次提交
    • P
      ARM: Convert to GENERIC_IRQ_MULTI_HANDLER · 4c301f9b
      Palmer Dabbelt 提交于
      Converts the ARM interrupt code to use the recently added
      GENERIC_IRQ_MULTI_HANDLER, which is essentially just a copy of ARM's
      existhing MULTI_IRQ_HANDLER.  The only changes are:
      
      * handle_arch_irq is now defined in a generic C file instead of an
        arm-specific assembly file.
       
      * handle_arch_irq is now marked as __ro_after_init.
      Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: linux@armlinux.org.uk
      Cc: catalin.marinas@arm.com
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: jonas@southpole.se
      Cc: stefan.kristiansson@saunalahti.fi
      Cc: shorne@gmail.com
      Cc: jason@lakedaemon.net
      Cc: marc.zyngier@arm.com
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: nicolas.pitre@linaro.org
      Cc: vladimir.murzin@arm.com
      Cc: keescook@chromium.org
      Cc: jinb.park7@gmail.com
      Cc: yamada.masahiro@socionext.com
      Cc: alexandre.belloni@bootlin.com
      Cc: pombredanne@nexb.com
      Cc: Greg KH <gregkh@linuxfoundation.org>
      Cc: kstewart@linuxfoundation.org
      Cc: jhogan@kernel.org
      Cc: mark.rutland@arm.com
      Cc: ard.biesheuvel@linaro.org
      Cc: james.morse@arm.com
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: openrisc@lists.librecores.org
      Link: https://lkml.kernel.org/r/20180622170126.6308-3-palmer@sifive.com
      4c301f9b
    • R
      ARM: oabi-compat: copy semops using __copy_from_user() · 8c8484a1
      Russell King 提交于
      __get_user_error() is used as a fast accessor to make copying structure
      members as efficient as possible.  However, with software PAN and the
      recent Spectre variant 1, the efficiency is reduced as these are no
      longer fast accessors.
      
      In the case of software PAN, it has to switch the domain register around
      each access, and with Spectre variant 1, it would have to repeat the
      access_ok() check for each access.
      
      Rather than using __get_user_error() to copy each semops element member,
      copy each semops element in full using __copy_from_user().
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      8c8484a1
    • R
      ARM: vfp: use __copy_from_user() when restoring VFP state · 42019fc5
      Russell King 提交于
      __get_user_error() is used as a fast accessor to make copying structure
      members in the signal handling path as efficient as possible.  However,
      with software PAN and the recent Spectre variant 1, the efficiency is
      reduced as these are no longer fast accessors.
      
      In the case of software PAN, it has to switch the domain register around
      each access, and with Spectre variant 1, it would have to repeat the
      access_ok() check for each access.
      
      Use __copy_from_user() rather than __get_user_err() for individual
      members when restoring VFP state.
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      42019fc5
  15. 30 7月, 2018 2 次提交
    • V
      ARM: 8784/1: NOMMU: Allow enter in Hyp mode · cbfc5619
      Vladimir Murzin 提交于
      ARMv8R adds support for virtualisation extension (with some deviation
      from v8A). With this patch hyp-unaware boot code can offload to kernel
      setting up HYP stuff in a sane state.
      Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      cbfc5619
    • V
      ARM: 8781/1: Fix Thumb-2 syscall return for binutils 2.29+ · afc9f65e
      Vincent Whitchurch 提交于
      When building the kernel as Thumb-2 with binutils 2.29 or newer, if the
      assembler has seen the .type directive (via ENDPROC()) for a symbol, it
      automatically handles the setting of the lowest bit when the symbol is
      used with ADR.  The badr macro on the other hand handles this lowest bit
      manually.  This leads to a jump to a wrong address in the wrong state
      in the syscall return path:
      
       Internal error: Oops - undefined instruction: 0 [#2] SMP THUMB2
       Modules linked in:
       CPU: 0 PID: 652 Comm: modprobe Tainted: G      D           4.18.0-rc3+ #8
       PC is at ret_fast_syscall+0x4/0x62
       LR is at sys_brk+0x109/0x128
       pc : [<80101004>]    lr : [<801c8a35>]    psr: 60000013
       Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
       Control: 50c5387d  Table: 9e82006a  DAC: 00000051
       Process modprobe (pid: 652, stack limit = 0x(ptrval))
      
       80101000 <ret_fast_syscall>:
       80101000:       b672            cpsid   i
       80101002:       f8d9 2008       ldr.w   r2, [r9, #8]
       80101006:       f1b2 4ffe       cmp.w   r2, #2130706432 ; 0x7f000000
      
       80101184 <local_restart>:
       80101184:       f8d9 a000       ldr.w   sl, [r9]
       80101188:       e92d 0030       stmdb   sp!, {r4, r5}
       8010118c:       f01a 0ff0       tst.w   sl, #240        ; 0xf0
       80101190:       d117            bne.n   801011c2 <__sys_trace>
       80101192:       46ba            mov     sl, r7
       80101194:       f5ba 7fc8       cmp.w   sl, #400        ; 0x190
       80101198:       bf28            it      cs
       8010119a:       f04f 0a00       movcs.w sl, #0
       8010119e:       f3af 8014       nop.w   {20}
       801011a2:       f2af 1ea2       subw    lr, pc, #418    ; 0x1a2
      
      To fix this, add a new symbol name which doesn't have ENDPROC used on it
      and use that with badr.  We can't remove the badr usage since that would
      would cause breakage with older binutils.
      Signed-off-by: NVincent Whitchurch <vincent.whitchurch@axis.com>
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      afc9f65e
  16. 27 7月, 2018 2 次提交
  17. 20 7月, 2018 1 次提交
    • P
      ARM/time: Remove read_boot_clock64() · 227e3958
      Pavel Tatashin 提交于
      read_boot_clock64() is deleted, and replaced with
      read_persistent_wall_and_boot_offset().
      
      The default implementation of read_persistent_wall_and_boot_offset()
      provides a better fallback than the current stubs for read_boot_clock64()
      that arm has with no users, so remove the old code.
      Signed-off-by: NPavel Tatashin <pasha.tatashin@oracle.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: steven.sistare@oracle.com
      Cc: daniel.m.jordan@oracle.com
      Cc: linux@armlinux.org.uk
      Cc: schwidefsky@de.ibm.com
      Cc: heiko.carstens@de.ibm.com
      Cc: john.stultz@linaro.org
      Cc: sboyd@codeaurora.org
      Cc: hpa@zytor.com
      Cc: douly.fnst@cn.fujitsu.com
      Cc: peterz@infradead.org
      Cc: prarit@redhat.com
      Cc: feng.tang@intel.com
      Cc: pmladek@suse.com
      Cc: gnomes@lxorguk.ukuu.org.uk
      Cc: linux-s390@vger.kernel.org
      Cc: boris.ostrovsky@oracle.com
      Cc: jgross@suse.com
      Cc: pbonzini@redhat.com
      Link: https://lkml.kernel.org/r/20180719205545.16512-19-pasha.tatashin@oracle.com
      227e3958
  18. 11 7月, 2018 4 次提交
  19. 09 7月, 2018 1 次提交
    • S
      arm: perf: prevent unbind/bind via sysfs · 64b2f025
      Stefan Agner 提交于
      Unbinding and rebinding the ARM PMU driver via sysfs leads to a
      warning followed by more errors:
        WARNING: CPU: 0 PID: 217 at kernel/irq/chip.c:1034 irq_modify_status+0x150/0x16c
        ..
        genirq: Flags mismatch irq 19. 00010c04 (arm-pmu) vs. 00010c04 (arm-pmu)
        hw perfevents: unable to request IRQ19 for ARM PMU counters
        hw perfevents: /pmu: failed to register PMU devices!
        armv7-pmu: probe of pmu failed with error -16
      
      The driver is clearly not designed to be removed. Disable bind/
      unbind for this driver.
      Signed-off-by: NStefan Agner <stefan@agner.ch>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      64b2f025
  20. 26 6月, 2018 2 次提交
    • F
      perf/arch/arm: Implement hw_breakpoint_arch_parse() · 9d52718c
      Frederic Weisbecker 提交于
      Migrate to the new API in order to remove arch_validate_hwbkpt_settings()
      that clumsily mixes up architecture validation and commit.
      Signed-off-by: NFrederic Weisbecker <frederic@kernel.org>
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joel Fernandes <joel.opensrc@gmail.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Rich Felker <dalias@libc.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Link: http://lkml.kernel.org/r/1529981939-8231-6-git-send-email-frederic@kernel.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      9d52718c
    • F
      perf/hw_breakpoint: Pass arch breakpoint struct to arch_check_bp_in_kernelspace() · 8e983ff9
      Frederic Weisbecker 提交于
      We can't pass the breakpoint directly on arch_check_bp_in_kernelspace()
      anymore because its architecture internal datas (struct arch_hw_breakpoint)
      are not yet filled by the time we call the function, and most
      implementation need this backend to be up to date. So arrange the
      function to take the probing struct instead.
      Signed-off-by: NFrederic Weisbecker <frederic@kernel.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Joel Fernandes <joel.opensrc@gmail.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Rich Felker <dalias@libc.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Link: http://lkml.kernel.org/r/1529981939-8231-3-git-send-email-frederic@kernel.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      8e983ff9