This is needed to use these with the clkdev helpers.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It makes no sense to have the CKCTL rate selection implemented as a flag
and a special exception in the top level set_rate/round_rate methods.
Provide CKCTL set_rate/round_rate methods, and use these for where ever
RATE_CKCTL is used and they're not already overridden.  This allows us
to remove the RATE_CKCTL flag.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

propagate_rate() is recursive, so it makes sense to minimise the
amount of stack which is used for each recursion.  So, rather than
recursing back into it from the ->recalc functions if RATE_PROPAGATES
is set, do that test at the higher level.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We've always called propagate_rate() in the parent function to
the .set_rate methods, so there's no point having the .set_rate
methods also call this heavy-weight function - it's mere
duplication of what's happening elsewhere.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Move the clock propagation calls for set_parent and set_rate into
the core omap clock code, rather than having these calls scattered
throughout the OMAP1 and OMAP2 implementations.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

which only has to return clk->parent.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Nothing makes any use of these functions, so there's little point in
providing them.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

... to eliminate unnecessary padding.  We have rather a lot of these
structures, so eliminating unnecessary padding results in a saving of
1488 bytes.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

clk->owner is always NULL, so its existence doesn't serve any useful
function other than bloating the kernel by 992 bytes.  Remove it.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The original code in omap2_clk_wait_ready() used to check the low 8
bits to determine whether they were within the FCLKEN or ICLKEN
registers.  Specifically, the test is satisfied when these offsets
are used:

 CM_FCLKEN, CM_FCLKEN1, CM_CLKEN, OMAP24XX_CM_FCLKEN2, CM_ICLKEN,
 CM_ICLKEN1, CM_ICLKEN2, CM_ICLKEN3, OMAP24XX_CM_ICLKEN4
 OMAP3430_CM_CLKEN_PLL, OMAP3430ES2_CM_CLKEN2

If one of these offsets isn't used, omap2_clk_wait_ready() merely
returns without doing anything.  So we should use the non-wait clkops
version instead and eliminate that conditional.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Rather than employing run-time tests in omap2_clk_wait_ready() to
decide whether we need to wait for the clock to become ready, we
can set the .ops appropriately.

This change deals with the OMAP24xx and OMAP34xx conditionals only.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

PARENT_CONTROLS_CLOCK just makes enable/disable no-op, and is
functionally an alias for ALWAYS_ENABLED.  This can be handled
in the same way, using clkops_null.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

... and use it for clocks which are ALWAYS_ENABLED.  These clocks
use a non-NULL enable_reg pointer for other purposes (such as
selecting clock rates.)
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Collect up all the common enable/disable clock operation functions
into a separate operations structure.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Nothing tests the clock flags for this bit, so it serves no purpose.
Remove it.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

"flash" is a very generic name for a platform_driver that is only
available on SA11x0.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Nicolas Pitre <nico@marvell.com>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with
locks initialized with it.

This fix is necessary to compile the linux-rt tree for ARM.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Steven Rostedt <srostedt@redhat.com>

In omap24xx_cpu_suspend assembly routine, the r2 register which holds
the address of the SDRC_POWER reg is set to zero before the value is
written back triggering a fault due to writing to address zero.

It's hard to tell where this change was introduced since this file
has been moved and merged.

While this fix prevents a crash, suspend on my n810 is broken with
current kernels.  I never come out of suspend.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

By Ingo Molnar, interrupts are not masked by default.
(refer to 76d21601)

But if interrupts are not masked, the processor can wake up while in
Suspend-to-RAM state by an external interrupt. For example, if an
OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM
state, it wake up automatically by M_IRQ_92. The disable_irq() function
can't disable the interrupt in H/W level, So I modified
arch/arm/mach-omap2/irq.c
Signed-off-by: NKim Kyuwon <chammoru@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

When 32 kHz timer is used the min_delta_ns should be initialized so
that it reflects the timer programming cost. A write to the timer
device will be usually posted, but it takes roughly 3 cycles before
it is effective. If the timer is reprogrammed before that, the CPU
will stall until the previous write completes. This was pointed out by
Richard Woodruff.

Since the lower bound for min_delta_ns is 1000, the change is visible
only with tick rates less than 3 MHz.

Also note that the old value is incorrect for 32 kHz also due to
a rounding error, and it can cause the timer queue to hang (due to
clockevent code trying to program the timer with zero ticks).
Signed-off-by: NAaro Koskinen <Aaro.Koskinen@nokia.com>
Reviewed-by: NRichard Woodruff <r-woodruff2@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The naming accidentally broke while changing the name for the
driver to not to conflict with the other mmc driver.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix omap34xx revision detection for ES3.1
Signed-off-by: NTony Lindgren <tony@atomide.com>

This has similar symptoms than 66c23551
where just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch
can cause incorrect dump_stack(). Here it can happen if channel has been
used before and the channel flags variable holds old status.
Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

CSR must be cleared before invoking the callback.

If the callback function starts a new, fast DMA transfer on the same
channel, the completion status might lost if CSR is cleared after
the callback invocation.
Signed-off-by: NJuha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.

omap_mcbsp_request()
\- clk_enable(mcbsp->clk)         [takes and holds clockfw_lock]
    \- omap2_clk_enable()
       \- _omap2_clk_enable()
           \- omap_mcbsp_clk_enable()
              \- clk_enable(child clock)   [tries for clockfw_lock again]

mcbsp_clk is a virtual clock and it comprises several child clocks. when
enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk
will enable its child clocks, then the deadlock occurs.

The solution is to remove the virtual clock and enable these child clocks in
omap_mcbsp_request() directly.
Signed-off-by: NStanley.Miao <stanley.miao@windriver.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

When there are multiple L1-aliasing userland mappings of the same physical
page, we currently remap each of them uncached, to prevent VIVT cache
aliasing issues. (E.g. writes to one of the mappings not being immediately
visible via another mapping.)  However, when we do this remapping, there
could still be stale data in the L2 cache, and an uncached mapping might
bypass L2 and go straight to RAM.  This would cause reads from such
mappings to see old data (until the dirty L2 line is eventually evicted.)

This issue is solved by forcing a L2 cache flush whenever the shared page
is made L1 uncacheable.

Ideally, we would make L1 uncacheable and L2 cacheable as L2 is PIPT. But
Feroceon does not support that combination, and the TEX=5 C=0 B=0 encoding
for XSc3 doesn't appear to work in practice.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Aaro says:
> With spinlock debugs enabled I get might_sleep() warnings when using
> ptrace.

tracked down to a missing enable_irq before calling do_undefinstr().
Reported-by: NAaro Koskinen <aaro.koskinen@nokia.com>
Tested-by: NAaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arch/arm/mach-msm/board-halibut.c:45: error: implicit declaration of function 'MSM_GPIO_TO_INT'
arch/arm/mach-msm/board-halibut.c:45: error: initializer element is not constant
arch/arm/mach-msm/board-halibut.c:45: error: (near initialization for 'smc91x_resources[1].start')
arch/arm/mach-msm/board-halibut.c:46: error: initializer element is not constant
arch/arm/mach-msm/board-halibut.c:46: error: (near initialization for 'smc91x_resources[1].end')
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The DaVinci code had an implementation of the OTG transceiver glue
too; make it use the new-standard one.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Acked-by: NFelipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Now that all EEPROM drivers live in the same place, let's harmonize
their symbol names.

Also fix eeprom's dependencies, it definitely needs sysfs, and is no
longer experimental after many years in the kernel tree.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>

The EH message for NODEV_HINT path was describing the opposite
condition.  Fix it.
Signed-off-by: NTejun Heo <tj@kernel.org>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Tomi Valkeinen reports:
  Running with latest linux-omap kernel on OMAP3 SDP board, I have
  problem with iounmap(). It looks like iounmap() does not properly
  free large areas. Below is a test which fails for me in 6-7 loops.

	for (i = 0; i < 200; ++i) {
		vaddr = ioremap(paddr, size);
		if (!vaddr) {
			printk("couldn't ioremap\n");
			break;
		}
		iounmap(vaddr);
	}

The changes to vmalloc.c weren't reflected in the ARM ioremap
implementation.  Turns out the fix is rather simple.
Tested-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
Tested-by: NMatt Gerassimoff <mgeras@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

... for devices.  Doing so is a bug, plain and simple, and drives
GregKH round the bend.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The old matching algorithm was too fuzzy, causing false positives.
For example, when asked for device D connection C1 and we only find
device D connection C2, we return that as a valid match despite the
connection names being different.

Change the algorithm such that:
  An entry with a NULL ID is assumed to be a wildcard.
  If an entry has a device ID, it must match
  If an entry has a connection ID, it must match

However, we maintain the order of precidence while still only doing
a single pass over all entries: dev+con > dev only > con only.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

From: David Brownell <dbrownell@users.sourceforge.net>
Subject: ARM/mach-davinci/usb.c buildfix

  CC      arch/arm/mach-davinci/usb.o
arch/arm/mach-davinci/usb.c:60: error: 'IRQ_USBINT' undeclared here (not in a function)
make[1]: *** [arch/arm/mach-davinci/usb.o] Error 1
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Which had the 'from' and 'to' pages reversed.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This is a framebuffer driver for i.MX31 SoCs. It only supports synchronous
displays, vertical panning supported, no overlay support.
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

i.MX3x SoCs contain an Image Processing Unit, consisting of a Control
Module (CM), Display Interface (DI), Synchronous Display Controller (SDC),
Asynchronous Display Controller (ADC), Image Converter (IC), Post-Filter
(PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC).
CM contains, among other blocks, an Interrupt Generator (IG) and a Clock
and Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are
supported over dmaengine and irq-chip APIs respectively.

IDMAC is a specialised DMA controller, its DMA channels cannot be used for
general-purpose operations, even though it might be possible to configure
a memory-to-memory channel for memcpy operation. This driver will not work
with generic dmaengine clients, clients, wishing to use it must use
respective wrapper structures, they also must specify which channels they
require, as channels are hard-wired to specific IPU functions.
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>