1. 01 11月, 2017 4 次提交
  2. 26 10月, 2017 3 次提交
  3. 24 10月, 2017 3 次提交
  4. 02 10月, 2017 1 次提交
  5. 29 9月, 2017 3 次提交
  6. 20 9月, 2017 1 次提交
  7. 04 9月, 2017 3 次提交
  8. 02 9月, 2017 3 次提交
  9. 31 8月, 2017 5 次提交
  10. 29 8月, 2017 1 次提交
    • A
      net: mvpp2: fix the mac address used when using PPv2.2 · 4c228682
      Antoine Tenart 提交于
      The mac address is only retrieved from h/w when using PPv2.1. Otherwise
      the variable holding it is still checked and used if it contains a valid
      value. As the variable isn't initialized to an invalid mac address
      value, we end up with random mac addresses which can be the same for all
      the ports handled by this PPv2 driver.
      
      Fixes this by initializing the h/w mac address variable to {0}, which is
      an invalid mac address value. This way the random assignation fallback
      is called and all ports end up with their own addresses.
      Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com>
      Fixes: 26975821 ("net: mvpp2: handle misc PPv2.1/PPv2.2 differences")
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4c228682
  11. 26 8月, 2017 1 次提交
  12. 24 8月, 2017 2 次提交
  13. 23 8月, 2017 7 次提交
  14. 04 8月, 2017 3 次提交
    • T
      net: mvpp2: add support for TX interrupts and RX queue distribution modes · 213f428f
      Thomas Petazzoni 提交于
      This commit adds the support for two related features:
      
       - Support for TX interrupts, with one interrupt for each CPU
      
       - Support for different RX queue distribution modes
         MVPP2_QDIST_SINGLE_MODE where a single interrupt, shared by all
         CPUs, receives the RX events, and MVPP2_QDIST_MULTI_MODE, where the
         per-CPU interrupts used for TX events are also used for RX events.
      
      Since additional interrupts are needed, an update to the Device Tree
      binding is needed. However, backward compatibility is preserved with
      the old Device Tree binding, by gracefully degrading to the original
      behavior, with only one RX interrupt, and TX completion being handled
      by an hrtimer.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      213f428f
    • T
      net: mvpp2: introduce queue_vector concept · 591f4cfa
      Thomas Petazzoni 提交于
      In preparation to the introduction of TX interrupts and improved RX
      queue distribution, this commit introduces the concept of "queue
      vector". A queue vector represents a number of RX and/or TX queues,
      and an associated NAPI instance and interrupt.
      
      This commit currently only creates a single queue_vector, so there are
      no changes in behavior, but it paves the way for additional
      queue_vector in the next commits.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      591f4cfa
    • T
      net: mvpp2: move from cpu-centric naming to "software thread" naming · df089aa0
      Thomas Petazzoni 提交于
      The PPv2.2 IP has a concept of "software thread", with all registers
      of the PPv2.2 mapped 8 times, for concurrent accesses by 8 "software
      threads". In addition, interrupts on RX queues are associated to such
      "software thread".
      
      For most cases, we map a "software thread" to the more conventional
      concept of CPU, but we will soon have one exception: we will have a
      model where we have one TX interrupt per CPU (each using one software
      thread), and all RX events mapped to another software thread
      (associated to another interrupt).
      
      In preparation for this change, it makes sense to change the naming
      from MVPP2_MAX_CPUS to MVPP2_MAX_THREADS, and plan for 8 software
      threads instead of 4 currently.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      df089aa0
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