- 07 3月, 2013 12 次提交
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Bit 8 is cache maintenance, bit 9 is external abort. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Instead of directly accessing the fault registers, use proper accessors so the core code can be shared. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
On 32bit ARM, unsigned long is guaranteed to be a 32bit quantity. On 64bit ARM, it is a 64bit quantity. In order to be able to share code between the two architectures, convert the registers to be unsigned long, so the core code can be oblivious of the change. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 25 2月, 2013 4 次提交
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由 Hiroshi Doyu 提交于
A counter part of arm_iommu_attach_device(). Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
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由 Hiroshi Doyu 提交于
This can be built without CONFIG_ARM_DMA_USE_IOMMU. Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
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由 Laurent Pinchart 提交于
The dma_iommu_mapping structure defined in asm/dma-iommu.h embeds a struct kref, include the appropriate header file. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
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由 Marc Zyngier 提交于
Commit bbacc0c1 (KVM: Rename KVM_MEMORY_SLOTS -> KVM_USER_MEM_SLOTS) broke KVM/ARM by changing a global #define. Apply the same change to fix the compilation breakage. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NGleb Natapov <gleb@redhat.com>
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- 20 2月, 2013 2 次提交
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由 Ian Campbell 提交于
On ARM we want these to be the same size on 32- and 64-bit. This is an ABI change on ARM. X86 does not change. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Keir (Xen.org) <keir@xen.org> Cc: Tim Deegan <tim@xen.org> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Cc: linux-arm-kernel@lists.infradead.org Cc: xen-devel@lists.xen.org Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Stefano Stabellini 提交于
ioremap can't be used to map ring pages on ARM because it uses device memory caching attributes (MT_DEVICE*). Introduce a Xen specific abstraction to map ring pages, called xen_remap, that is defined as ioremap on x86 (no behavioral changes). On ARM it explicitly calls __arm_ioremap with the right caching attributes: MT_MEMORY. Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 17 2月, 2013 2 次提交
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由 Thierry Reding 提交于
In order to allow drivers to specify private data for each controller, this commit adds a private_data field to the struct hw_pci. This field is an array of nr_controllers pointers that will be used to initialize the private_data field of the corresponding controller's pci_sys_data structure. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Parts of the virtual memory layout (mainly the modules area) are described using open-coded immediate values. Use the SZ_ definitions from linux/sizes.h instead to make the code clearer. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 2月, 2013 2 次提交
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由 Al Viro 提交于
__ARCH_WANT_SYS_RT_SIGACTION, __ARCH_WANT_SYS_RT_SIGSUSPEND, __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND, __ARCH_WANT_COMPAT_SYS_SCHED_RR_GET_INTERVAL - not used anymore CONFIG_GENERIC_{SIGALTSTACK,COMPAT_RT_SIG{ACTION,QUEUEINFO,PENDING,PROCMASK}} - can be assumed always set.
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由 Arnd Bergmann 提交于
We are getting a number of warnings about the use of the deprecated bus_to_virt function in drivers using the ARM ISA DMA API: drivers/parport/parport_pc.c: In function 'parport_pc_fifo_write_block_dma': drivers/parport/parport_pc.c:622:3: warning: 'bus_to_virt' is deprecated (declared at arch/arm/include/asm/memory.h:253) [-Wdeprecated-declarations] This is only because that function gets used by the inline set_dma_addr() helper. We know that any driver for the ISA DMA API is correctly using the DMA addresses, so we can change this to use the __bus_to_virt() function instead, which does not warn. After this, there are no remaining drivers that are used on any defconfigs on ARM using virt_to_bus or bus_to_virt, with the exception of the OSS sound driver. That driver is only used on RiscPC, NetWinder and Shark, so we can set ARCH_NO_VIRT_TO_BUS on all other platforms and hide the deprecated functions, which is far more effective than marking them as deprecated, in order to avoid any new users of that code. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk>
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- 12 2月, 2013 10 次提交
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由 Marc Zyngier 提交于
Do the necessary save/restore dance for the timers in the world switch code. In the process, allow the guest to read the physical counter, which is useful for its own clock_event_device. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Add some the architected timer related infrastructure, and support timer interrupt injection, which can happen as a resultof three possible events: - The virtual timer interrupt has fired while we were still executing the guest - The timer interrupt hasn't fired, but it expired while we were doing the world switch - A hrtimer we programmed earlier has fired Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Add the init code for the hypervisor, the virtual machine, and the virtual CPUs. An interrupt handler is also wired to allow the VGIC maintenance interrupts, used to deal with level triggered interrupts and LR underflows. A CPU hotplug notifier is registered to disable/enable the interrupt as requested. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Plug the interrupt injection code. Interrupts can now be generated from user space. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Add VGIC virtual CPU interface code, picking pending interrupts from the distributor and stashing them in the VGIC control interface list registers. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Add the GIC distributor emulation code. A number of the GIC features are simply ignored as they are not required to boot a Linux guest. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Christoffer Dall 提交于
User space defines the model to emulate to a guest and should therefore decide which addresses are used for both the virtual CPU interface directly mapped in the guest physical address space and for the emulated distributor interface, which is mapped in software by the in-kernel VGIC support. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Wire the basic framework code for VGIC support and the initial in-kernel MMIO support code for the VGIC, used for the distributor emulation. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
When an interrupt occurs for the guest, it is sometimes necessary to find out which vcpu was running at that point. Keep track of which vcpu is being run in kvm_arch_vcpu_ioctl_run(), and allow the data to be retrieved using either: - kvm_arm_get_running_vcpu(): returns the vcpu running at this point on the current CPU. Can only be used in a non-preemptible context. - kvm_arm_get_running_vcpus(): returns the per-CPU variable holding the running vcpus, usable for per-CPU interrupts. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Christoffer Dall 提交于
On ARM some bits are specific to the model being emulated for the guest and user space needs a way to tell the kernel about those bits. An example is mmio device base addresses, where KVM must know the base address for a given device to properly emulate mmio accesses within a certain address range or directly map a device with virtualiation extensions into the guest address space. We make this API ARM-specific as we haven't yet reached a consensus for a generic API for all KVM architectures that will allow us to do something like this. Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 08 2月, 2013 1 次提交
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由 Will Deacon 提交于
We have received multiple reports of mmap failures when running with a 2:2 vm split. These manifest as either -EINVAL with a non page-aligned address (ending 0xaaa) or a SEGV, depending on the application. The issue is commonly observed in children of make, which appears to use bottom-up mmap (assumedly because it changes the stack rlimit). Further investigation reveals that this regression was triggered by 394ef640 ("mm: use vm_unmapped_area() on arm architecture"), whereby TASK_UNMAPPED_BASE is no longer page-aligned for bottom-up mmap, causing get_unmapped_area to choke on misaligned addressed. This patch fixes the problem by defining TASK_UNMAPPED_BASE in terms of TASK_SIZE and explicitly aligns the result to 16M, matching the other end of the heap. Acked-by: NNicolas Pitre <nico@linaro.org> Reported-by: NSteve Capper <steve.capper@arm.com> Reported-by: NJean-Francois Moine <moinejf@free.fr> Reported-by: NChristoffer Dall <cdall@cs.columbia.edu> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 2月, 2013 1 次提交
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由 Barry Song 提交于
Commit 91c2ebb9 (ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode) added resume entry for l2 in secure mode, but it missed the dummy entry when CONFIG_CACHE_L2X0 is not set. (Commit text edited by rmk.) Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 2月, 2013 1 次提交
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由 Shawn Guo 提交于
Extend imx6q DEBUG_LL uart port selection support to cover all i.MX SoCs. The 'range' of the Kconfig option gets dropped, as users looking at the option must know the uart number on his board. The bottom line is that the build system will report an error if an invalid port number is picked for given SoC. The header arch/arm/include/debug/imx-uart.h is created to accommodate all the uart base addresses. And the header will also be used for other low-level debug facility later. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 04 2月, 2013 3 次提交
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Al Viro 提交于
Only alpha and sparc are unusual - they have ka_restorer in it. And nobody needs that exposed to userland. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 01 2月, 2013 1 次提交
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由 Rob Herring 提交于
Add an empty version of scu_enable for !SMP builds. This fixes compile error for highbank suspend code on !SMP builds. Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 31 1月, 2013 1 次提交
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由 Mark Rutland 提交于
The core functionality of the arch_timer driver is not directly tied to anything under arch/arm, and can be split out. This patch factors out the core of the arch_timer driver, so it can be shared with other architectures. A couple of functions are added so that architecture-specific code can interact with the driver without needing to touch its internals. The ARM_ARCH_TIMER config variable is moved out to drivers/clocksource/Kconfig, existing uses in arch/arm are replaced with HAVE_ARM_ARCH_TIMER, which selects it. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
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