提交 · 1bb3f6a252c92cbc07884091e185a51b4ccb4f1d · openanolis / cloud-kernel

08 7月, 2013 1 次提交
- B
  drm/nouveau: fix minor thinko causing bo moves to not be async on kepler · 1bb3f6a2
  由 Ben Skeggs 提交于 7月 08, 2013
```
Reported-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  1bb3f6a2
05 7月, 2013 22 次提交

drm/nva3/disp: Fix HDMI audio regression · bf03d1b2

由 Ilia Mirkin 提交于 7月 03, 2013

This is the nva3 counterpart to commit beba44b1 (drm/nv84/disp: Fix
HDMI audio regression). The regression happened as a result of
refactoring in commit 8e9e3d2d (drm/nv84/disp: move hdmi control into
core).
Reported-and-tested-by: NMax Baldwin <archerseven@gmail.com>
Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org

bf03d1b2

drm/nv50-/disp: Use output specific mask in interrupt · 378f2bcd

由 Emil Velikov 提交于 7月 02, 2013

The commit

   commit 476e84e1
   Author: Ben Skeggs <bskeggs@redhat.com>
   Date:   Mon Feb 11 09:24:23 2013 +1000

       drm/nv50-/disp: initial supervisor support for off-chip encoders

changed the write mask in one of the interrupt functions for on-chip encoders,
causing a regression in certain VGA dual-head setups. This commit reintroduces
the mask thus resolving the regression

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66129Reported-and-Tested-by: NYves-Alexis <corsac@debian.org>
Cc: stable@vger.kernel.org [3.9+]
CC: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: NEmil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

378f2bcd

drm/nouveau: use vmalloc for pgt allocation · d005f51e

由 Marcin Slusarz 提交于 6月 11, 2013

Page tables on nv50 take 48kB, which can be hard to allocate in one piece.
Let's use vmalloc.
Signed-off-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
Cc: stable@vger.kernel.org [3.7+]
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

d005f51e

B
drm/nvc0-/gr: remove some more of the hardcoded register writes · 5c5ae715
由 Ben Skeggs 提交于 7月 05, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
5c5ae715

drm/nvc0-/gr: factor out yet more unknown magic into versioned functions · d196e16e

由 Ben Skeggs 提交于 7月 05, 2013

NVC1/NVD9 are the only chipsets that should have anything different
happen on them after this.  We previously weren't doing these
register modifications, and NVIDIA do.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

d196e16e

B
drm/nvd7/devinit: use fermi class, not tesla · 0bfd6f73
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
0bfd6f73
B
drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16 · 60a4acd7
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
60a4acd7
B
drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucode · f8adeb82
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
f8adeb82
B
drm/nvf0/gr: build cs ucode for GK110 · 8f6fe267
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
8f6fe267
B
drm/nvc0-/gr: extend one of the magic calculations for >4 GPCs · 960b4381
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
960b4381

drm/nvf0/gr: fix ddx shaders locking up on me · 0085a605

由 Ben Skeggs 提交于 7月 04, 2013

This can be generalised and used on GK104 (probably even GF117), but lets
just make it work for now.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

0085a605

B
drm/nvc0/devinit: minor typo · 18ac4246
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
18ac4246
B
drm/nvf0/gr: enable support, if external cs ucode is available · 9d1c4c51
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
9d1c4c51
B
drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding · b054aadf
由 Ben Skeggs 提交于 7月 04, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
b054aadf
B
drm/nvf0/ce: enable support · 9ec2dbba
由 Ben Skeggs 提交于 5月 02, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
9ec2dbba
B
drm/nvf0/fifo: enable support · 56fbd2b6
由 Ben Skeggs 提交于 5月 02, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
56fbd2b6

drm/nvd7/gr: initial support · 26410c67

由 Maarten Lankhorst 提交于 7月 04, 2013

Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

26410c67

B
drm/nvc0-/gr: generate cs register lists from grctx data · a32b2ffb
由 Ben Skeggs 提交于 7月 01, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
a32b2ffb
B
drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs · 70f824ac
由 Ben Skeggs 提交于 7月 01, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
70f824ac

drm/nve0-/gr: some new gpc registers can have multiple copies · 5ee86c41

由 Ben Skeggs 提交于 7月 01, 2013

GK110 exposes more than one, and needs to be dealt with in the ctxsw
ucode just like the TPC sets are.

Broadcast is at +0xe00.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

5ee86c41

B
drm/nvc0-/gr: pull out a group of separately context-switched gpc regs · c03ff9e8
由 Ben Skeggs 提交于 7月 01, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
c03ff9e8

drm/nvc0-/gr: make register lists from initvals functions · 30f4e087

由 Ben Skeggs 提交于 6月 09, 2013

Generated context verified to be the same for all supported chipsets.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

30f4e087

01 7月, 2013 17 次提交
- M
  drm/nvd0-/disp: handle case where display engine is missing/disabled · 791dc143
  由 Maarten Lankhorst 提交于 6月 27, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  791dc143
- B
  drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 · e99716f1
  由 Ben Skeggs 提交于 6月 05, 2013
```
No code changes, proven by envyas producing identical binaries.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  e99716f1
- I
  drm/nouveau/bsp/nv84: initial vp2 engine implementation · 05f9a5bc
  由 Ilia Mirkin 提交于 6月 27, 2013
```
Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  05f9a5bc
- I
  drm/nouveau/vp/nv84: initial vp2 engine implementation · a0376b14
  由 Ilia Mirkin 提交于 6月 27, 2013
```
Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  a0376b14
- I
  drm/nouveau/core: xtensa engine base class implementation · 44b1e3bd
  由 Ilia Mirkin 提交于 6月 27, 2013
```
Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  44b1e3bd
- I
  drm/nouveau/vdec: fork vp3 implementations from vp2 · 0d4a1450
  由 Ilia Mirkin 提交于 6月 27, 2013
```
Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  0d4a1450
- B
  drm/nouveau/core: move falcon class to engine/ · a0fd4ec8
  由 Ben Skeggs 提交于 6月 27, 2013
```
Not really "core" per-se.  About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  a0fd4ec8
- B
  drm/nouveau/kms: don't fail if there's no dcb table entries · d2898713
  由 Ben Skeggs 提交于 6月 25, 2013
```
Fixes module not loading on Tesla K20.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  d2898713
- M
  drm/nouveau: remove limit on gart · 79442c3a
  由 Maarten Lankhorst 提交于 6月 17, 2013
```
Most graphics cards nowadays have a multiple of this limit as their vram,
so limiting GART doesn't seem to make much sense.
Signed-off-by: NMaarten &gt;Lnkhorst <maarten.lankhorst@canonical.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  79442c3a
- M
  drm/nouveau/vm: perform a bar flush when flushing vm · 36798b61
  由 Maarten Lankhorst 提交于 6月 11, 2013
```
Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes
internally".

nvidia always seems to do this flush after writing values.
Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  36798b61
- B
  drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches · 57f0ec15
  由 Ben Skeggs 提交于 5月 14, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  57f0ec15
- B
  drm/nvc8/gr: update initial register/context values · eb12f57b
  由 Ben Skeggs 提交于 5月 14, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  eb12f57b
- B
  drm/nvc4/gr: update initial register/context values · dba50728
  由 Ben Skeggs 提交于 5月 14, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  dba50728
- B
  drm/nvc1/gr: update initial register/context values · 58ef2305
  由 Ben Skeggs 提交于 5月 13, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  58ef2305
- B
  drm/nvc3/gr: update initial register/context values · 8b637ae3
  由 Ben Skeggs 提交于 5月 13, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  8b637ae3
- B
  drm/nvc0/gr: update initial register/context values · d8b02dbb
  由 Ben Skeggs 提交于 5月 13, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  d8b02dbb
- B
  drm/nvd9/gr: update initial register/context values · 37c3afd0
  由 Ben Skeggs 提交于 5月 13, 2013
```
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
```
  37c3afd0

openanolis / cloud-kernel 1 年多 前同步成功

openanolis / cloud-kernel
1 年多前同步成功