- 26 6月, 2013 1 次提交
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由 H. Peter Anvin 提交于
Bit 1 in the x86 EFLAGS is always set. Name the macro something that actually tries to explain what it is all about, rather than being a tautology. Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Gleb Natapov <gleb@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Link: http://lkml.kernel.org/n/tip-f10rx5vjjm6tfnt8o1wseb3v@git.kernel.org
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- 15 12月, 2012 1 次提交
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由 David Howells 提交于
Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NMichael Kerrisk <mtk.manpages@gmail.com> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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- 22 9月, 2012 1 次提交
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由 H. Peter Anvin 提交于
Add X86_CR4_SMAP to <asm/processor-flags.h>. Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/r/1348256595-29119-4-git-send-email-hpa@linux.intel.com
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- 12 7月, 2012 1 次提交
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由 Mao, Junjie 提交于
This patch handles PCID/INVPCID for guests. Process-context identifiers (PCIDs) are a facility by which a logical processor may cache information for multiple linear-address spaces so that the processor may retain cached information when software switches to a different linear address space. Refer to section 4.10.1 in IA32 Intel Software Developer's Manual Volume 3A for details. For guests with EPT, the PCID feature is enabled and INVPCID behaves as running natively. For guests without EPT, the PCID feature is disabled and INVPCID triggers #UD. Signed-off-by: NJunjie Mao <junjie.mao@intel.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 06 12月, 2011 1 次提交
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由 Seiichi Ikarashi 提交于
The x86_64 kernel pushes the fake kernel stack in arch/x86/kernel/entry_64.S:FAKE_STACK_FRAME, and rflags register in it does not conform to the specification. Although Intel's manual[1] says bit 1 of it shall be set to 1, this bit is cleared to 0 on pushing the fake stack. [1] Intel(R) 64 and IA-32 Architectures Software Developer's Manual Vol.1 3-21 Figure 3-8. EFLAGS Register If it is not on purpose, it is better to be fixed, because it can lead some tools misunderstanding the stack frame. For example, "crash" utility[2] actually detects it and warns you like below: RIP: ffffffff8005dfa2 RSP: ffff8104ce0c7f58 RFLAGS: 00000200 [...] bt: WARNING: possibly bogus exception frame Signed-off-by: NSeiichi Ikarashi <s.ikarashi@jp.fujitsu.com> Tested-by: NMasayoshi MIZUMA <m.mizuma@jp.fujitsu.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 12 7月, 2011 1 次提交
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由 Yang, Wei 提交于
This patch removes RDWRGSFS bit from CR4_RESERVED_BITS. Signed-off-by: NYang, Wei <wei.y.yang@intel.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 18 5月, 2011 1 次提交
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由 Fenghua Yu 提交于
Add support for newly documented SMEP (Supervisor Mode Execution Protection) CPU feature in CR4. Signed-off-by: NFenghua Yu <fenghua.yu@intel.com> LKML-Reference: <1305683069-25394-3-git-send-email-fenghua.yu@intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 18 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
They were generated by 'codespell' and then manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi> Cc: trivial@kernel.org LKML-Reference: <1300389856-1099-3-git-send-email-lucas.demarchi@profusion.mobi> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 23 10月, 2008 2 次提交
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由 H. Peter Anvin 提交于
Change header guards named "ASM_X86__*" to "_ASM_X86_*" since: a. the double underscore is ugly and pointless. b. no leading underscore violates namespace constraints. Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 31 7月, 2008 1 次提交
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由 Suresh Siddha 提交于
Enables xsave/xrstor by turning on cr4.osxsave on cpu's which have the xsave support. For now, features that OS supports/enabled are FP and SSE. Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 24 7月, 2008 1 次提交
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由 Vegard Nossum 提交于
Apparently, commit 6330a30a Author: Vegard Nossum <vegard.nossum@gmail.com> Date: Wed May 28 09:46:19 2008 +0200 x86: break mutual header inclusion introduced some CONFIG names to processor-flags.h, which was exported in commit 6093015d Author: Ingo Molnar <mingo@elte.hu> Date: Sun Mar 30 11:45:23 2008 +0200 x86: cleanup replace most vm86 flags with flags from processor-flags.h, fix Fix it by wrapping the CONFIG parts in __KERNEL__. Reported-by: NOlaf Hering <olaf@aepfle.de> Signed-off-by: NVegard Nossum <vegard.nossum@gmail.com> Cc: Adrian Bunk <bunk@kernel.org> Cc: Olaf Hering <olaf@aepfle.de> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 23 7月, 2008 1 次提交
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由 Vegard Nossum 提交于
This patch is the result of an automatic script that consolidates the format of all the headers in include/asm-x86/. The format: 1. No leading underscore. Names with leading underscores are reserved. 2. Pathname components are separated by two underscores. So we can distinguish between mm_types.h and mm/types.h. 3. Everything except letters and numbers are turned into single underscores. Signed-off-by: NVegard Nossum <vegard.nossum@gmail.com>
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- 02 6月, 2008 1 次提交
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由 Vegard Nossum 提交于
This breaks up the mutual inclusion between headers ptrace.h and vm86.h by moving some small part of vm86.h which is needed by ptrace.h into processor-flags.h. We also try to move #include lines to the top. This has been compile tested on x86_32 and x86_64 defconfig, and run through 'make headers_check'. Cc: Adrian Bunk <bunk@kernel.org> Signed-off-by: NVegard Nossum <vegard.nossum@gmail.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 13 10月, 2007 1 次提交
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由 Rusty Russell 提交于
Intel manual (and KVM definition) say the TPR is 4 bits wide. Also fix CR8_RESEVED_BITS typo. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Acked-by: NH. Peter Anvin <hpa@zytor.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 11 10月, 2007 1 次提交
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由 Thomas Gleixner 提交于
Move the headers to include/asm-x86 and fixup the header install make rules Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 03 5月, 2007 2 次提交
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由 H. Peter Anvin 提交于
This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs. It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync. Signed-off-by: NH. Peter Anvin <hpa@zytor.com> Signed-off-by: NAndi Kleen <ak@suse.de>
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由 Andi Kleen 提交于
Move X86_EFLAGS_IF et al out to a new header: processor-flags.h, so we can include it from irqflags.h and use it in raw_irqs_disabled_flags(). As a side-effect, we could now use these flags in .S files. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Signed-off-by: NAndi Kleen <ak@suse.de>
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