This patch disables PCI PS for QCA988X and QCA99X0, Since PCI PS is
validated for QCA6174, let it be enabled only for QCA6174. It would be
better to execute PCI PS related functions only for the supported devices.

PCI time out issue is observed with QCA99X0 on x86 platform, We will
disable PCI PS for QCA988X and QCA99X0 until PCI PS is properly implemented.

Taking and releasing ps_lock is causing higher CPU consumption. Michal Kazior
suggested ps_lock overhead to be reworked so that ath10k_pci_wake/sleep
functions are called less often, i.e. move the powersave logic up (only during
irq handling, tx path, submitting fw commands) but that's a bigger change and
can be implemented later.
Signed-off-by: NAnilkumar Kolli <akolli@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Since polling for tx completion is handled whenever target to host
messages are received, removing the unnecessary polling mechanism for
send completion at HTC level.
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Since polling for received messages not supported, remove unused
dl_is_polled.
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Currently target to host (T2H) HTT messages are received at copy engine 1.
These messages are processed by HTC layer in both host and target.
To avoid HTC level processing overhead in both host and target,
the unused copy engine 5 is being used for receiving HTT T2H messages.
This will speedup the receive data processing as well as htt tx completion.
Hence host and target copy engine configuration tables are updated
to enable CE5 pipe. The in-direction HTT mapping is now pointing to CE5
for all HTT T2H.

Moreover HTT send completion messages are polled from HTC handler
as CE 4 is not interrupt-driven. For faster tx completion, CE4 polling
needs to be done whenever CE pipe which transports HTT Rx (target->host)
is processed. This avoids overhead of polling HTT messages from HTC
layer. Servicing CE 4 faster is helping to solve "failed to transmit
packet, dropping: -105".
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Some special copy engines delivers messages directly to HTT by
bypassing HTC layer. Hence exporting tx_completion and rx_handler
for delivering the data to HTT layer.
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Register receive callbacks for every copy engines (CE) separately
instead of having common receive handler. Some of the copy engines
receives different type of messages (i.e HTT/HTC/pktlog) from target.
Hence to service them accordingly, register per copy engine receive
callbacks.
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Register send completion callbacks for every copy engines (CE) separately
instead of having common completion handler. Since some of the copy
engines delivers different type of messages, per-CE callbacks help to
service them differently.
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Export HTC layer tx and rx handlers. This will be used by HIF layer
for per-CE data processing. Instead of callback mechanism, HIF will
call appropriate upper layers API directly.
Reviewed-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

The logic in the error-handling path of ath10k_mac_register() is
divergent from the logic in ath10k_mac_unregister().  Update the
ath10k_mac_register() error handling logic to align with the
ath10k_mac_unregister() logic.
Signed-off-by: NJeff Johnson <jjohnson@qca.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

First remove the 'cooling_device#n' syslink created
for ath10k and then unregsiter from the thermal subsystem(cooling)
Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

QCA99X0 uses radio specific board names based on chip id and
board id combinations. We get these IDs from the target using BMI after otp.bin
has been started.

This patch reorders the call to the function ath10k_core_fetch_board_file
so that we have OTP binary before requesting for boardid-chipid. We get this
OTP data after parsing firmware-N.bin.

[kvalo@qca.qualcomm.com: try BMI_PARAM_GET_EEPROM_BOARD_ID with
 all boards and detect if command is not supported]
Signed-off-by: NManikanta Pubbisetty <c_mpubbi@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

QCA6174 needs different board files based on board type. To make it easier to
distribute multiple board files and automatically choose correct board file
create a simple TLV file format following the same principles as with FW IEs.
The file is named board-2.bin and contain multiple board files. Each board file
then can have multiple names.

ath10k searches for file board-N.bin (where N is the interface version number
for the board file, just like we for firmware files) in /lib/firmware/*, for
example for qca99x0 it will try to find it here:

/lib/firmware/ath10k/QCA99X0/hw2.0/board-2.bin

If ath10k doesn't find board-2.bin then it will fallback to the old board.bin file.

This patch adds a simple name scheme using pci device id which for now will be
used by qca6174:

bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x

This removes the old method of having subsystem ids in ar->spec_board_id and
using that in the board file name.
Signed-off-by: NManikanta Pubbisetty <c_mpubbi@qti.qualcomm.com>
[kvalo@qca.qualcomm.com: simplified the file format, rewrote commit log, other smaller changes]
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

The current number of spatial streams used by the client is advertised
as a separate IE in assoc request. Use this information to set
the NSS operating mode.

Fixes: 45c9abc0 ("ath10k: implement more versatile set_bitrate_mask").
Signed-off-by: NVivek Natarajan <nataraja@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

After processing received packets from copy engine, host will allocate
new buffer and queue them back to copy engine ring for further
packet reception. On post rx processing path, skb allocation and
dma mapping are unnecessarily handled within ce_lock. This is affecting
peak throughput and also causing more CPU consumption. Optimize this
by acquiring ce_lock only when accessing copy engine ring and moving
skb allocation out of ce_lock.

In AP148 platform with QCA99x0 in conducted environment, UDP uplink peak
throughput is improved from ~1320 Mbps to ~1450 Mbps and TCP uplink peak
throughput is increased from ~1240 Mbps (70% host CPU load) to ~1300 Mbps
(71% CPU load). Similarly ~40Mbps improvement is observed in downlink
path.
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

It is noticed that pci wakeup time is exceeding current timeout (10ms)
randomly which is tested on QCA988x. So, the wake up time is increased
to 30 ms and added debug prints to log total timeout.
Signed-off-by: NMaharaja Kennadyrajan <c_mkenna@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

ath10k driver is using dma_pool_alloc per packet and dma_pool_free
in coresponding at Tx completion.
Use of pre-allocated DMA buffer in Tx will improve saving CPU resource
by 5% while it consumes about 56KB memory more as trade off.
Signed-off-by: NPeter Oh <poh@qca.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

ath10k is using Native WiFi mode as default mode for both of
Tx and Rx path, but it could be changed when driver registers
with a module parameter for specific purpose such as mesh.

The Rx decap mode sent to firmware during WMI initialization should
use the same mode that driver configured at its registration stage
in case of using raw mode, so that host driver receives MAC frame
header containing necessary fields such as QoS and Mesh Control
and uses them in right way to make data traffic work.
Signed-off-by: NPeter Oh <poh@qca.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

The Transmit Power Control (TPC) dump will show the power control values for
each rate which makes it easier to debug calibration problems.

Example usage:

# cat /sys/kernel/debug/ieee80211/phy0/ath10k/tpc_stats
TPC config for channel  5180  mode  10

CTL             = 0x10 Reg. Domain              = 58
Antenna Gain    = 1    Reg. Max Antenna Gain    = 0
Power Limit     = 34   Reg. Max Power           = 34
Num tx chains   = 3    Num supported rates      = 155

**********CDD POWER TABLE*******

No.  Preamble Rate_code tpc_valu1 tpc_value2 tpc_value3
0       CCK     0x40       0            0       0
1       CCk     0x41       0            0       0

[...]

154     HTCUP   0x 0       24           0       0
**********STBC POWER TABLE******
No.  Preamble Rate_code tpc_valu1 tpc_value2 tpc_value3
0       CCK     0x40       0            0       0

[...]

154     HTCUP   0x 0       24           24      0
**********TXBF POWER TABLE******

is used to dump the tx power control stats.
Signed-off-by: NMaharaja Kennadyrajan <c_mkenna@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Copy a_sle32_to_cpu() from ath6kl so that we can easily handle signed __le32
values. This is needed in struct wmi_pdev_tpc_config_event.
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

from checkpatch:

drivers/net/wireless/ath/ath10k/mac.c:1113: line over 90 characters
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

checkpatch found:

drivers/net/wireless/ath/ath10k/core.c:574: Blank lines aren't necessary before a close brace '}'
drivers/net/wireless/ath/ath10k/mac.c:4067: Missing a blank line after declarations
drivers/net/wireless/ath/ath10k/mac.c:4083: Missing a blank line after declarations
drivers/net/wireless/ath/ath10k/mac.c:4084: spaces required around that '>>=' (ctx:WxV)
drivers/net/wireless/ath/ath10k/pci.c:1507: Missing a blank line after declarations
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

drivers/net/wireless/ath/ath10k/wmi.c:3023: void function return statements are not generally useful
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

drivers/net/wireless/ath/ath10k/htt_tx.c:457: braces {} are not necessary for single statement blocks
drivers/net/wireless/ath/ath10k/htt_tx.c:545: braces {} are not necessary for single statement blocks
drivers/net/wireless/ath/ath10k/mac.c:200: braces {} are not necessary for single statement blocks
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

checkpatch found:

drivers/net/wireless/ath/ath10k/core.c:513: Alignment should match open parenthesis
drivers/net/wireless/ath/ath10k/core.c:1266: code indent should use tabs where possible
drivers/net/wireless/ath/ath10k/core.c:1267: code indent should use tabs where possible
drivers/net/wireless/ath/ath10k/core.c:1268: code indent should use tabs where possible
drivers/net/wireless/ath/ath10k/core.c:1269: code indent should use tabs where possible
drivers/net/wireless/ath/ath10k/mac.c:4659: Alignment should match open parenthesis
drivers/net/wireless/ath/ath10k/mac.c:6271: Alignment should match open parenthesis
drivers/net/wireless/ath/ath10k/pci.c:2260: Alignment should match open parenthesis
drivers/net/wireless/ath/ath10k/wmi.c:3510: Alignment should match open parenthesis
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

checkpatch found:

drivers/net/wireless/ath/ath9k/core.c:490: Logical continuations should be on the previous line
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

In case of qca99x0 and MSI-X supported/enabled we
failed during interrupts registering with message:

ath10k_pci 0000:04:00.0: failed to request MSI-X ce irq 50: -22

Issue/fix was reproduced/tested using Dell Latitude E6430 laptop.
Signed-off-by: NJanusz Dziedzic <janusz.dziedzic@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

ldpc is not configured for fixed rates. This blocks auto rate vs fixed
rate performance comparison. Since firmware is considering ldpc vdev
param for fixed rate selection, it has to be configured to enable ldpc
for fixed rates.
Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

This was missed in the original commit adding the flag and ath10k only printed "bit10":

ath10k_pci 0000:02:00.0: qca988x hw2.0 (0x4100016c, 0x043202ff) fw 10.2.4.70.6-2 api 3
htt-ver 2.1 wmi-op 5 htt-op 2 cal otp max-sta 128 raw 0 hwcrypto 1 features no-p2p,bit10

Also add a build test to avoid this happening again.

Fixes: ccec9038 ("ath10k: enable raw encap mode and software crypto engine")
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Vdevs associated with a given chanctx should be
restarted if the bandwidth changes. Otherwise
traffic may cease.

This is known to fix STA CSA with bandwidths wider
than 20MHz.
Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

This is necessary to make vdev restarting logic
reusable later.
Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

The remain_on_channel callback needs different
timeout. Calling ieee80211_queue_work() with a
shorter delay after calling it with a longer delay
will not change the timer. This caused the
offchannel timeout worker to not trigger in time
and caused the device to stay on channel longer
then expected. This could cause some problems and
was be easily reproduced with `iw offchannel`
command.
Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Add support for mesh to ath10k.  We simply use an AP virtual interface
in the firmware in order to enable beaconing without TSF adoption, and
use the raw (802.11) transmit mode.

Due to firmware limitations, the firmware must operate in raw
(non-native 802.11) mode.  As this is configured at firmware init time,
a new "rawmode" modparam is added, and mesh interfaces are available
only if rawmode=true.  The firmware must advertise support for rawmode;
tested successfully with firmware 10.2.4.70.6-2.

When the module is loaded with (newly implemented) modparam rawmode=1, it
will enable operating an open mesh STA via something like the following:

    ip link set wlan0 down
    iw dev wlan0 set type mp
    ip link set wlan0 up
    iw dev wlan0 set freq 5745 80 5775
    iw dev wlan0 mesh join mesh-vht
Signed-off-by: NBob Copeland <me@bobcopeland.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

In the case of raw mode without nohwcrypt parameter, we
should still make sure the frame is protected before
adding MIC_LEN to avoid skb_under_panic errors.
Signed-off-by: NBob Copeland <me@bobcopeland.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

By default, ath10k restricts received frames to those matching BSSID.
When other BSS frames are requested (e.g. in mesh mode), add an internal
monitor device so those frames are not filtered.
Signed-off-by: NBob Copeland <me@bobcopeland.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Sometimes hardware reports invalid mcs index in rx descriptor
when operating in VHT80 mode and all packets with invalid mcs
will be eventually dropped in mac80211. This issue is observerd during
testing on QCA99X0 chipsets.

This patch adds a warn message for dumping the rx desc info which helps
in analysing the issue when invalid mcs is received.
Signed-off-by: NManikanta Pubbisetty <c_mpubbi@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

Similarly to the VHT STS, this is supposed to be propagated by firmware.
In case it's not, use the default value, but as last resort.
Signed-off-by: NBartosz Markowski <bartosz.markowski@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

The VHT STS CAP shall be reported by firmware to host, like in case of
QCA99x0. For QCA6174 hw family this isn't set for some reason.
So for this particular chips, let's assume it has the ability to
support VHT NDP in up to 4 STSs (which is true by the way).

Change the published beamformee STS cap accordingly to 3 or to what
the firmware reports.

Assumption so far, it suppose to be the num_rf_chains-1, was
completely wrong.
Signed-off-by: NBartosz Markowski <bartosz.markowski@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

In a noisy environment, when multiple interfaces are created,
the management tx descriptors are fully occupied by the probe
responses from all the interfaces. This prevents a new station
from a successful association.

Fix this by limiting the probe responses when the specified
threshold limit is reached.
Signed-off-by: NVivek Natarajan <nataraja@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

During long hours of stress testing like AP interface up/down along
with continuous ping flood from a station doing connect/disconnect,
it is observed that the system is not able to allocate DMA consistent
memory of size > 512KB chunks as requested by firmware in WMI_SERVICE_EVENTID.
With the system memory getting fragmented during the run based on the
size of the memory requested, the failure to return physically continguous
memory of high order can happen. Once the system gets to this situation,
bringing up the wifi interface will fail and a system reboot may be needed
to make it work again. This problem is obseved with QCA99X0.

To fix this issue, allocate the DMA memory requested by firmware during
device probe time and keep it during the life time of the device. WMI service
ready event handler is changed to allocate the memory chunks if it is
not already allocated or if the memory allocated for the previous ready
event is not same as the current requested ones. After this patch the
memory usage when wifi is inactive will be inceased by few 100KB to
3MB based on the target type.

Failure happens with the following stack trace

[29557.488773] kworker/u4:1: page allocation failure: order:8, mode:0xd0
[29557.494297] CPU: 0 PID: 8402 Comm: kworker/u4:1 Not tainted 3.14.43 #7
[29557.500793] Workqueue: ath10k_aux_wq ath10k_wmi_event_service_ready_work [ath10k_core]
[29557.508602] [<c021e9b0>] (unwind_backtrace) from [<c021ba90>] (show_stack+0x10/0x14)
[29557.516580] [<c021ba90>] (show_stack) from [<c03bdddc>] (dump_stack+0x88/0xcc)
[29557.523612] [<c03bdddc>] (dump_stack) from [<c0290e34>] (warn_alloc_failed+0xdc/0x108)
[29557.531515] [<c0290e34>] (warn_alloc_failed) from [<c0292d88>] (__alloc_pages_nodemask+0x4f0/0x654)
[29557.540485] [<c0292d88>] (__alloc_pages_nodemask) from [<c0222b48>] (__dma_alloc_buffer.isra.20+0x2c/0x104)
[29557.550260] [<c0222b48>] (__dma_alloc_buffer.isra.20) from [<c0222c34>] (__alloc_remap_buffer.isra.23+0x14/0xb8)
[29557.560413] [<c0222c34>] (__alloc_remap_buffer.isra.23) from [<c022305c>] (__dma_alloc+0x224/0x2b8)
[29557.569490] [<c022305c>] (__dma_alloc) from [<c0223208>] (arm_dma_alloc+0x84/0x90)
[29557.577010] [<c0223208>] (arm_dma_alloc) from [<bf5159d0>] (ath10k_wmi_event_service_ready_work+0x2f8/0x420 [ath10k_core])
[29557.588055] [<bf5159d0>] (ath10k_wmi_event_service_ready_work [ath10k_core]) from [<c024260c>] (process_one_work+0x20c/0x328)
[29557.599305] [<c024260c>] (process_one_work) from [<c02432d0>] (worker_thread+0x228/0x360)
[29557.607470] [<c02432d0>] (worker_thread) from [<c0247f88>] (kthread+0xd8/0xec)
[29557.614750] [<c0247f88>] (kthread) from [<c0208d18>] (ret_from_fork+0x14/0x3c)
[29557.712751] Normal: 696*4kB (UEMR) 512*8kB (UEMR) 367*16kB (UEMR) 404*32kB (UEMR) 455*64kB (UEMR) 424*128kB (UEMR) 379*256kB (UMR) 327*512kB (UMR) 1*1024kB (R) 0*2048kB 0*4096kB = 374544kB
Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>

MU-MIMO Rx involves different interpretation of
the VHT-SIG-A compared to SU-MIMO.

The incorrect interpretation led ath10k to report
VHT MCS values greater than 9 which subsequently
prompted mac80211 to drop such frames. This
effectively broke Rx with MU-MIMO in many cases
and manifested with a kernel warning in the log
which looked like this:

  [   14.552520] WARNING: CPU: 2 PID: 0 at net/mac80211/rx.c:3578 ieee80211_rx+0x26c/0x940 [mac80211]()
  [   14.552522] Rate marked as a VHT rate but data is invalid: MCS: 10, NSS: 2
  ... call trace follows ...
Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>