Uses the gpiolib irqchip helpers.  For this to work, the irq setup
function is called once per bank instead of once per device.  Note
that all known uses of this block have a BCM7120 L2 interrupt
controller as a parent.  Supports interrupts for all GPIOs.

In the IRQ handler, we check for raised IRQs for invalid GPIOs and
warn (ratelimited) if they're encountered.

Also, several drivers (e.g. gpio-keys) allow for GPIOs to be
configured as wakeup sources, and this GPIO controller supports that
through a separate interrupt path.

The de-facto standard DT property "wakeup-source" is checked, since
that indicates whether the GPIO controller hardware can wake.  Uses
the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have
any of its own wakeup source configuration.

Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me)
that you can have multiple chained irqchips and associated IRQ domains
for a single parent IRQ, and as long as the xlate function is written
correctly, a GPIO IRQ request end up checking the correct domain and
will get associated with the correct IRQ.  What helps make this clear
is to read
  drivers/gpio/gpiolib-of.c:
   - of_gpiochip_find_and_xlate()
   - of_get_named_gpiod_flags()
  drivers/gpio/gpiolib.c:
   - gpiochip_find()
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

On ETRAX FS, all pins on the first port (and only the first port) have
interrupt support.

On ARTPEC-3, all pins on all ports have interrupt support.  However,
there are only eight interrupts.  Each of the interrupts is associated
with a group of pins and for each interrupt the one pin from the group
which will trigger it can be selected.
Signed-off-by: NRabin Vincent <rabin@rab.in>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add ZTE zx296702 GPIO controller support
Signed-off-by: NJun Nie <jun.nie@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The driver gpio-mvebu.c does not depend on gpio-generic.c at all.
Drop unneeded "select GPIO_GENERIC".
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The driver gpio-altera.c does not depend on gpio-generic.c at all.
Drop unneeded "select GPIO_GENERIC".
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NTien Hock Loh <thloh@altera.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Added support to Zynq Ultrascale+ MPSoC on the existing zynq
gpio driver.
Signed-off-by: NAnurag Kumar Vulisha <anuragku@xilinx.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add a GPIO driver for the General I/O block on Axis ETRAX FS SoCs.
Signed-off-by: NRabin Vincent <rabin@rab.in>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds support for the GPIO IP "UPG GIO" used on
Broadcom STB SoCs (BCM7XXX and some others). Uses
basic_mmio_gpio to instantiate a gpio_chip for each bank.
The driver assumes that it handles the base set of GPIOs
on the system and that it can start its numbering sequence
from 0, so any GPIO expanders used with it must dynamically
assign GPIO numbers after this driver has finished
registering its GPIOs.

Does not implement the interrupt-controller portion yet,
will be done in a future commit.

v2:
- change include to use <linux/gpio/driver.h> instead of
  <linux/gpio.h>
- get rid of unnecessary imask member in struct bank
- rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
- always have 32 GPIOs per bank and add 'width' member in
  struct bank to hold actual number of GPIOs in use
- mark of_match table as const
List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add GPIO controller driver for Netlogic XLP MIPS64 SOCs.

This driver is instantiated by device tree and supports interrupts
for GPIOs.
Signed-off-by: NKamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We currently get all kinds of errors building the omap gpio driver
as a module starting with:

undefined reference to `omap2_gpio_resume_after_idle'
undefined reference to `omap2_gpio_prepare_for_idle'
...

Let's fix the issue by adding inline functions to the header.
Note that we can now also remove the two unused functions for
omap_set_gpio_debounce and omap_set_gpio_debounce_time.

Then doing rmmod on the module produces further warnings
because of missing exit related functions. Let's add those.

And finally, we can make the Kconfig entry just a tristate
option that's selected for omaps.

Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Driver for the GPIO block found on NXP LPC18xx/43xx devices.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Synopsys DesignWare DWAPB GPIO block is popular to
synthesize amongst many architectures: X86, ARM, ARC.
The driver was restricted to only these archs due to
using [read|write]l_relaxed() accessors that were not
universally available in the past,
but as of commit 9439eb3a
"asm-generic: io: implement relaxed accessor macros as
conditional wrappers" these accessors are available on all
archs so this should not be a problem any more. Enable the
driver for all archs.

Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Synopsys SDP platform uses DW GPIO controller in design with
ARC cores. So adding ARC to architectures that may select this
GPIO controller.

Even though support for Synopsys SDP is yet to be submitted we'll need
this tiny option enabled at least for properly working interrupts (DW
GPIO controller is used as interrupt controller).
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Create Kconfig submenus for memory mapped, I2C, MFD,
PCI, SPI and USB GPIO drivers to help navigate the forest
of drivers in this subsystem. The I2C, SPI and USB menus
get dependencies so we don't have to see them unless we
have the required subsystem enabled in the first place.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Get rid of AC97, MODULbus and other weird subheadings for
GPIO drivers. Move all MFD drivers out of I2C etc and in under
the MFD comment. This is too weird as it is and makes no
sense, if the dependent parent driver is MFD, group these as
MFD GPIO drivers. Alphabetize and move this comment group
inbetween "I2C" and "PCI" to also have the groups in
alphabetic order.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Move the Kconfig option for the Broadcom BCM Kona up to the
commin GPIO controllers, as it is currently grouped under
MODULbus expanders which it definately is not.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Rearrange the SPI GPIO expanders in alphabetic order
as already indicated by the comment in the file.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Rearrange PCI GPIO controllers in alphabetic order
as already indicated by the comment in the file.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Rearrange the I2C GPIO expanders in alphabetic order
as already indicated by the comment in the file.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This rearranges the GPIO drivers Kconfig symbols alphabetically
as the top comment in the file already states they should be.
No functional changes whatsoever.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Improve Loongson-2's GPIO driver to support Loongson-3A/3B, and update
Loongson-3's default config file.
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NHuacai Chen <chenhc@lemote.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Move Loongson-2's GPIO driver to drivers/gpio and add Kconfig options.
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NHuacai Chen <chenhc@lemote.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

All systems using the TC3589x multifunction expander uses
devicetree, so don't clutter the place with a lot of
and assume it is there.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

This driver is orphaned now that mach-msm has been removed.
Delete it.

Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

All systems using the TC3589x multifunction expander uses
devicetree, so don't clutter the place with a lot of
and assume it is there.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The Intel Quark SoC contains the DW GPIO on board. While fixing the build error
the commit 1972c97d (gpio: dwapb: fix compile errors) disables the
possibility to build the driver on X86, i.e. Intel Quark.

The patch reenables it for Intel Quark as well.

Since we have Intel Quark SoC introduced in 4.0-rc1 I would like to make this
fix available there as well, though the actual MFD driver [1] is applied only
for next version.

[1] https://lkml.org/lkml/2015/2/1/217

Fixes: 1972c97d (gpio: dwapb: fix compile errors)
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add support for the GPIOs found on the Fintek SuperI/O chip F71869A,
such as the one found on the Jetway JNF99-525 motherboard, to the f7188x
gpio driver.
Signed-off-by: NAndreas Bofjall <andreas@gazonk.org>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add support for the GPIOs found on the Fintek SuperI/O chip F71869, such
as the one found on the Jetway NF96u-525 motherboard, to the f7188x gpio
driver.
Signed-off-by: NAndreas Bofjall <andreas@gazonk.org>
Tested-by: NLes Schaffer <schaffer@optonline.net>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Hisilicon arm64 soc uses designWare gpio, re-enable it after
commit 1972c97d(gpio: dwapb: fix compile errors).
Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Adds a new driver for Altera soft GPIO IP. The driver is able to do
read/write and allows GPIO to be a interrupt controller.

Tested on Altera GHRD on interrupt handling and IO.

v10:
- Updated conflicting device tree parameters
- Removed unused headers
- Used macro instead of magic numbers for ngpio
- Code readability cleanup using ?: and temporal variables
- Removed leftover garbage and unnecessary function calls
- Checked bgpio_init but unusable because Altera GPIO may not
  be a multiple of 8 bits

v9:
- Removed duplicated initialization on set_type using temporals
  to improve code readability in calling generic_handle_irq
- Using ?: ternary to reduce code size

v8:
- Using for_each_set_bit
- Added const for struct definition
- Removed naggy pr_err
- Sort alpha header
- Remove unused macros
- Use fixed width data types instead of unsigned long
- Whitespace issue fixes
- Removed _relaxed function for better compatibility across different
  CPU
- Changed irq_create_mapping to platform_get_irq updated implementation
  to use gpiochip_irqchip_add
- Reserve interrupt-cells number 2 in device tree binding for future
  use
- Remove confusing sections on devicetree bindings
- Added tristate Kconfig help text

v7:
- Used dev_warn instead of pr_warn
- Clean up unnecesarry if else indentation

v6:
- Added irq_startup and irq_shutdown
- Changed bitwise clamping style
- Cleanup bitwise operation to improve readability change naming of
  mapped irqs from virq to mapped_irq

v5:
- Dispose irq_domain mapping correctly
- Update optional binding description in binding docs

v4:
- Added vendor prefix to devicetree binding for IP specific properties
  using MMIO GPIO helper library instead of manually map PIO to memory
- altera_gpio_chip inline struct documentation to kerneldoc
- Using dev_ print to print a better failure message

v2, v3:
- Do not reference NO_IRQ
- Updated irq_set_type to only allow the hardware configured irq type
Signed-off-by: NTien Hock Loh <thloh@altera.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Switch the PCF857x GPIO driver to use the gpiolib irqchip helpers.
This driver uses a nested threaded interrupt, hence handle_nested_irq()
and gpiochip_set_chained_irqchip() must be used.

Note that this removes the checks added in commit 21fd3cd1
("gpio: pcf857x: call the gpio user handler iff gpio_to_irq is done"),
as the interrupt mappings are no longer created on-demand by the driver,
but by gpiochip_irqchip_add() during initialization.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Take a sweep to bring the irq support for the MAX732x expanders
into the gpiolib core to cut down on duplicated code.

Only compile tested! I need some feedback from people using this
expander with interrupts to tell me if things go right or
wrong when I do this.

Cc: Semen Protsenko <semen.protsenko@globallogic.com>
Cc: Mans Rullgard <mans@mansr.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The PPC_OF is a ppc specific option which is used to mean that the
firmware device tree access functions are available. Since all the
ppc platforms have a device tree, it is aways set to 'y' for ppc.
So it makes no sense to keep a such option in the current kernel.
Replace it with PPC.
Signed-off-by: NKevin Hao <haokexin@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Driver for Fujitsu MB86S7x SoCs that have a memory mapped GPIO controller.
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: NAndy Green <andy.green@linaro.org>
Signed-off-by: NVincent Yang <Vincent.Yang@tw.fujitsu.com>
Signed-off-by: NTetsuya Nuriya <nuriya.tetsuya@jp.fujitsu.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Require that device tree be used with STMPE (all platforms use this)
and enforce OF_GPIO, then delete the platform data.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Driver for standby GPIO controller of APM X-Gene SoCs on arm64.
Signed-off-by: NY Vo <yvo@apm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch converts GE GPIO driver to use basic_mmio_gpio
generic library.
Signed-off-by: NKamlakant Patel <kamlakant.patel@linaro.org>
Acked-by: NMartyn Welch <martyn.welch@ge.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NSemen Protsenko <semen.protsenko@globallogic.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

X86 Kconfig symbol is X86, not ARCH_X86.

Fixes: c586b3075d5b47d8 (gpio/xilinx: Add support for X86 Arch)
Reported-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Switch the R-Car Gen2 GPIO driver to use the gpiolib irqchip helpers.

While doing this also make sure that gpiochip_irqchip_add() is called
after the gpiochip itself is registered, as required.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>