- 27 9月, 2017 33 次提交
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由 Doug Ledford 提交于
Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Bharat Potnuri 提交于
Error logs of iw_cxgb4 needs to be printed by default. This patch changes the necessary pr_debug() to appropriate pr_<log level>. Signed-off-by: NPotnuri Bharat Teja <bharat@chelsio.com> Reviewed-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Bharat Potnuri 提交于
pr_debug() can be enabled to print function names, So removing the unwanted __func__ parameters from debug logs. Realign function parameters. Signed-off-by: NPotnuri Bharat Teja <bharat@chelsio.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Arvind Yadav 提交于
pr_err() messages should end with a new-line to avoid other messages being concatenated. Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: NYuval Shaia <yuval.shaia@oracle.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Arvind Yadav 提交于
pr_err() and mlx5_ib_dbg( messages should terminated with a new-line to avoid other messages being concatenated. Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: NYuval Shaia <yuval.shaia@oracle.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Yuval Shaia 提交于
Call ipoib_remove_one when one of the IPoIB ports fails to initialize in order not to leave the module in unstable state. Signed-off-by: NYuval Shaia <yuval.shaia@oracle.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Colin Ian King 提交于
sqp is being initialised when it is being declared and then updated a little later on making the first initialization redundant. Clean this up by initializing ptr and sqp at their declaration. Cleans up warning: "warning: Value stored to 'sqp' during its initialization is never read" Fixes: a58e58fa ("RDMA/cxgb3: Wrap the software send queue pointer as needed on flush") Signed-off-by: NColin Ian King <colin.king@canonical.com> Acked-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Arnd Bergmann 提交于
After changing INIT_UDATA_BUF_OR_NULL() to an inline function, this does the same change to INIT_UDATA for consistency. I'm keeping it separate as this part is much larger and we wouldn't want to backport this to stable kernels if we ever want to address the gcc warnings by backporting the first patch. Again, using an inline function gives us better type safety here among other issues with macros. I'm using u64_to_user_ptr() to convert the user pointer to simplify the logic rather than adding lots of new type casts. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Arnd Bergmann 提交于
We get a harmless warning about the fact that we use the result of a multiplication as a condition: drivers/infiniband/core/uverbs_main.c: In function 'ib_uverbs_write': drivers/infiniband/core/uverbs_main.c:787:40: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context] drivers/infiniband/core/uverbs_main.c:787:117: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context] drivers/infiniband/core/uverbs_main.c:790:50: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context] drivers/infiniband/core/uverbs_main.c:790:151: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context] This avoids the problem by using an inline function in place of the macro. Fixes: a96e4e2f ("IB/uverbs: New macro to set pointers to NULL if length is 0 in INIT_UDATA()") Suggested-by: NChristoph Hellwig <hch@infradead.org> Link: https://patchwork.kernel.org/patch/9940777/Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Yuval Shaia 提交于
CHELSIO_T3 already depend on INET CHELSIO_T4 already depend on (IPV6 || IPV6=n) Signed-off-by: NYuval Shaia <yuval.shaia@oracle.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Yuval Shaia 提交于
No reason to have dependency on PCI for the entire infiniband stack so move it to KConfig of only the drivers that actually using PCI. Signed-off-by: NYuval Shaia <yuval.shaia@oracle.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Colin Ian King 提交于
Trivial fix to spelling mistake in WARN message Signed-off-by: NColin Ian King <colin.king@canonical.com> Reviewed-by: NLeon Romanovsky <leonro@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
It deletes the unnecessary initializing enum to zero. Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Reviewed-by: NLeon Romanovsky <leonro@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
This patch fixes smatch inconsistent warning as below: drivers/infiniband/hw/hns/hns_roce_hem.h:136 hns_roce_hem_first() warn: inconsistent indenting Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
This patch replaces condition statement to reduce usage of hardware version information in common driver. Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
This patch adds releasing resource operation in error branch of the function named hns_roce_table_get. Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
The MTPT records the attribute of the registered MR. The MTPT format will be updated in hip08, and the MTPT should be configured. This patch is to configure the MTPT for the registered MR in hip08. Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
This patch is implementing for posting send request and receiving request for hip08 RoCE driver. such as post send verbs and post recv verbs. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
This patch implements QP operations for hip08 RoCE driver and fixes some checkpatch warning about print message in QP function. The QP operations includes create QP, query QP, modify QP and destroy QP. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
This patch adds CQ relevant operations for hip08 RoCE driver, such as create CQ, destroy CQ, poll CQ and Request Completion Notification(req_notify_cq). Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
In hip08, the user access region(UAR) pfn is calculated from pci device memory resource. This patch mainly sets mac and gid table by configuring the relevant registers and updates the uar pfn for hip08 SoC. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
The block base address in the MR can be retrieved by the block number which is calculated with the VA in the SGE and MTPT. In hip08, the PBL supports multi hop addressing to retrieve the block base address by the block number. This patch is to add the interfaces in the MR to support multi hop addressing for the PBL. Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Shaobo Xu 提交于
In hip08, the SQWQE/SGE/RQWQE and CQE have different hop num and page size, so we need to manage the base address table of the SQWQE/SGE/RQWQE and CQE separately. This patch is to split CQE from MTT(SQWQE/SGE/RQWQE). Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Shaobo Xu 提交于
The MTT(SQWQE/SGE/RQWQE) and CQE in hip08 can support multi hop addressing. The address of MTT/CQE can be retrieved by the BT (Base Address Table) with multi hop addressing. This patch is to update the interfaces in HEM to support multi hop addressing for the MTT/CQE. Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
BT is used to retrieve the addresses of the contexts(QPC/MPT/CQC/SRQC) in memory. In order to support multi hop addressing for the contexts, the BT BA should be configured by mailbox, and the BT attribution will be set by command. This patch is to configure the BT BA and BT attribution for the contexts. Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Shaobo Xu 提交于
The contexts (QPC/MTPT/CQC/SRQC) in hip08 can support multi hop addressing. The address of context can be retrieved by the BT (Base Address Table) with multi hop addressing. The first hop BT BA can be retrieved from the RAM in the chip by the bt_idx and bt_num. This patch is to add the interfaces in HEM to support multi hop addressing for the contexts. Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
In hip08 SoC, the hardware implementation of mailbox command has changed with hip06 SoC. As a result, it adjusts the architecture of the command code and implements the interfaces of mailbox for hip08 SoC. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
The profile's content mainly set some specifications and obtain some hardware resources by implementing the relative commands. Because max sge num of send queue is not the same with receive queue in hip08, we modified the calculation of props->max_sge in query_device ops. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
The command queue is the configuration queue. The software configures hardware by filling the commands into command queues. It includes command send queue and receive queue. In hip08 RoCE engine, It supports to configure and query registers by command queue. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
In order to support the scalability of the hardware version, the features irrelevant to the hardware will be located in the hns-roce.ko, and the hardware relevant operations will be located in hns_roce_hw_v1.ko or hns_roce_hw_v2.ko based on the series chips. The hip08 RoCE engine is a PCI device, hip06 RoCE engine is a platform device. In order to support both platform device and PCI device, We replace &hr_dev->pdev->dev with hr_dev->dev in hns-roce.ko as belows: Before modification: struct device *dev = hr_dev->dev; After modification: struct device *dev = &hr_dev->pdev->dev; The related structure: struct hns_roce_dev { ... struct platform_device *pdev; struct pci_dev *pci_dev; struct device *dev; ... } Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
The hip08 RoCE engine is a PCI device. This patch mainly obtains some information of PCI device for hip08 RoCE from hns3 NIC driver in the initialization. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
Move the data member called priv from hns_roce_hw to hns_roce_dev structure in order to support multiple hns_roce devices in one system at the same time. For example, there are two hip06 engines in the system. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Wei Hu(Xavier) 提交于
The hardware relevant definitions and operations are implemented in hns_roce_hw_v* file. According to the diversity chips, the file is named as hns_roce_hw_v1.c or hns_roce_hw_v2.c etc. The general software process flow, common structures and allocated algorithms are implemented in other files located in hns roce driver. In order to support the scalability of the hardware version, the common driver features are in the hns-roce.ko, and the hardware relevant operations are in hns_roce_hw_v1.ko or hns_roce_hw_v2.ko based on the series chips. Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NShaobo Xu <xushaobo2@huawei.com> Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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- 25 9月, 2017 7 次提交
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由 Doug Ledford 提交于
Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Doug Ledford 提交于
Merge my for-next branch to Linux 4.14-rc2 and open up the for-next area for 4.15 kernel development. Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Linus Torvalds 提交于
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux由 Linus Torvalds 提交于
Pull DeviceTree fixes from Rob Herring: - fix build for !OF providing empty of_find_device_by_node - fix Abracon vendor prefix - sync dtx_diff include paths (again) - a stm32h7 clock binding doc fix * tag 'devicetree-fixes-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: clk: stm32h7: fix clock-cell size scripts/dtc: dtx_diff - 2nd update of include dts paths to match build dt-bindings: fix vendor prefix for Abracon of: provide inline helper for of_find_device_by_node
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip由 Linus Torvalds 提交于
Pull x86 fixes from Ingo Molnar: "Another round of CR3/PCID related fixes (I think this addresses all but one of the known problems with PCID support), an objtool fix plus a Clang fix that (finally) solves all Clang quirks to build a bootable x86 kernel as-is" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/asm: Fix inline asm call constraints for Clang objtool: Handle another GCC stack pointer adjustment bug x86/mm/32: Load a sane CR3 before cpu_init() on secondary CPUs x86/mm/32: Move setup_clear_cpu_cap(X86_FEATURE_PCID) earlier x86/mm/64: Stop using CR3.PCID == 0 in ASID-aware code x86/mm: Factor out CR3-building code
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip由 Linus Torvalds 提交于
Pull timer fix from Ingo Molnar: "A clocksource driver section mismatch fix" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/integrator: Fix section mismatch warning
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip由 Linus Torvalds 提交于
Pull irq fixes from Ingo Molnar: "Three irqchip driver fixes, and an affinity mask helper function bug fix affecting x86" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Revert "genirq: Restrict effective affinity to interrupts actually using it" irqchip.mips-gic: Fix shared interrupt mask writes irqchip/gic-v4: Fix building with ancient gcc irqchip/gic-v3: Iterate over possible CPUs by for_each_possible_cpu()
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